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Application Note FCP Option (Model 875)

Vector Signal Generator (VSG) Fast Control Port

Purpose

The VSG can now be controlled over an additional port for fast time-critical settings and
data streaming. This application note explains the configuration and usage of the Fast
Control Port option.

Table of Contents

Introduction

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FCP Operation Modes

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IQ Data Streaming with FCP

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Setup FCP for IQ Data Streaming

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Related SCPI Commands

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IQ Stream Timing

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SCPI & FCP Example

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FCP Input Delay Calibration

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Step by Step Guide for Calibration ................................................................................... 6
Required Signals during Calibration ................................................................................ 6

Selecting Memory Segments

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Setup for Selecting Memory Segments

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FCP Segment SCPI Commands

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Segment Stream Timing

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SCPI & FCP Example

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FCP Test Mode

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Related SCPI Commands

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FCP IQ Stream in Test Mode

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FCP Segment Stream in Test Mode

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Cable Assembly

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Further Documentation

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Page 1

2955 Kerner Blvd.

•

San Rafael, CA 94901

•

Tel: (415) 453-9955

•

[email protected]

Summary of Contents for AnaPico 875

Page 1: ...tup FCP for IQ Data Streaming 3 Related SCPI Commands 3 IQ Stream Timing 4 SCPI FCP Example 5 FCP Input Delay Calibration 5 Step by Step Guide for Calibration 6 Required Signals during Calibration 6 Selecting Memory Segments 9 Setup for Selecting Memory Segments 9 FCP Segment SCPI Commands 9 Segment Stream Timing 9 SCPI FCP Example 10 FCP Test Mode 11 Related SCPI Commands 11 FCP IQ Stream in Test...

Page 2: ...ption to choose the replayed IQ data By streaming the memory segments IDs of the desired IQ data the user is thus able to directly switch between the stored IQ data segments Figure 1 Functional diagram of FCP in VSG with non FCP parts omitted FCP Operation Modes The fast control port FCP supports two main use cases IQ Data streaming to the device for direct IQ modulation Segment ID streaming to se...

Page 3: ... 250 MSps SDR This is equivalent to the data bits toggling between I and Q every 4ns 2ns respectively Please consult Figure 4 for a graphical representation To avoid undesired frequency offset effects it is recommended to operate the sender that drives the clock and the IQ data andyour VSG at the same reference clock Setup FCP for IQ Data Streaming Configuration steps prior to transmission 1 2 3 C...

Page 4: ...l other FCP modes are disabled SOURce BB ARBitrary FCP STATe OFF ON 0 1 Sets the FCP as the source of IQ modulation RST value OFF Figure 3 The BB ARB FCP STAT command decides if the FCP IQ data is forwarded for IQ modulation This command only takes hold if the BB ARB WAV STAT command is disabled IQ Stream Timing Figure 4 IQ stream input timing for the fast control port FCP with clock period 𝑇 2𝑛𝑠 ...

Page 5: ...50 MHz Enables RF output Sets the playback rate to 125MHz Sets FCP to IQ stream mode Sets FCP as a source of the IQ modulation data After successfully configuring the device the IQ modulation data e g a 1 tone can be sent to the FCP make sure the valid signal is synchronized to the first 16 bit I data sample A valid input IQ stream results in a modulated carrier frequency at the RF output You can ...

Page 6: ...alibration The calibration will take several minutes to complete Please do not modify or disturb the setup during this process Required Signals during Calibration The same LFSR pattern that is used for the FCP tests is also deployed for the calibration see section FCP IQ Stream in Test Mode for related information To calibrate the FCP input with your existing setup please make sure you meet the fo...

Page 7: ...x306C i_1 x696F i_2 x5E80 q_0 xFFFF q_1 x7F7F q_2 x5F9F and so forth Figure 5 depicts how the I and Q data should be sent consecutively Please make sure there is a new data sample at every rising clock edge The data sample that arrives along with any rising edge of the valid bit must be an I data sample not a Q data sample However this data sample does not necessarily have to be the i_0 sample It ...

Page 8: ... external reference and all the sender generated signals of all the FCP signals If the reference clock is not locked to both the sender and the VSG the FCP input calibration may fail due to frequency offset effects that can not be circumvented Required FCP Signals The following figures each show an example of the signals required at the FCP pins during calibration All signals are explained separat...

Page 9: ...th the SCPI command FCP STR SEG ON FCP Segment SCPI Commands SOURce FCPort STReam SEGment OFF ON 0 1 Sets the FCP to stream segments IDs RST value OFF Figure 7 The FCPort STReam SEGment command determines whether the FCP is streaming memory segment IDs Note that this mode can only be enabled if all other FCP modes e g stream IQ are turned off Segment Stream Timing The FCP receives a valid signal t...

Page 10: ...V STAT ON Sets initial RF output frequency 50MHz Enables RF output Sets FCP as a source for segment selection Sets FCP to segment stream mode Sets RAM as a source of the IQ modulation data After successfully configuring the device the segment ID can be sent to the FCP make sure the positive edge of your valid signal is sent along with the 16 bit segment ID signal You can now Set some frequency wit...

Page 11: ...URce FCPort DIAGnostic Prints the previously gathered diagnostic information of the FCP The displayed information varies according to streaming mode When the FCP test mode is activated the test information and results are shown along with the diagnostic information on the current FCP state FCP IQ Stream in Test Mode The diagnostic information for the FCP relays the state of the received clock on F...

Page 12: ...ng edge of the valid bit simultaneously with an I data as described in section IQ Stream Timing The comparator will then compare the data on the FCP input while it is valid and count the number of errors detected for each bit The pattern comparison will stop if the valid bit is low and resume when it is high again The diagnostic information of the FCP that can be accessed with the FCP DIAG command...

Page 13: ...y diagnostic information about the valid bit and the received address In test mode the address input is directly forwarded to the diagnostic information along with the state of the valid bit Example of a possible FCP DIAG command response FCP FCP FCP diagnostic State ready Segment 1 Stream Slave FCP FCP FCP Test Data Input enabled valid 0x0004 Page 13 2955 Kerner Blvd San Rafael CA 94901 Tel 415 4...

Page 14: ...presentative directly Further Documentation 1 BNC Programmer s Manual for Signal Generators https www berkeleynucleonics com downloads Berkeley Nucleonics Corporation Phone Email 2955 Kerner Boulevard San Rafael CA 94901 United Statesof America 415 453 9955 info berkeleynucleonics com www berkeleynucleonics com AnaPico Inc of Switzerland Europa Strasse 9 8152 Glattbrugg Switzerland Phone Email 41 ...

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