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12 of 33
Rev 1.0 04/17/2006
Released
Literature # ADS-005104
Default: Uninstalled, DAC oscillator enabled
JP24 “PROM CLKOUT ENABLE” – When installed, Enables the prom clkout to drive the configuration clock (CCLK) for FPGA Slave
Mode configuration. If using the PROM device as the clock source, make sure the jumper on JP27 is not installed and that the jumper
settings on JP2 put the FPGA in a Slave configuration mode. Note: The PROM must supply CCLK when a compressed configuration
file is used.
Default: Open, the FPGA provides the configuration clock.
JP25 “PROM ENABLE” – PROM Enable, position 1-2 connects the DONE pin on the FPGA to the chip enable pin of the PROM(s).
Position 2-3 will pull the enable low. The PROM is disabled by a pull-up resistor when a jumper is not installed. Default: Installed on 1-
2; using the DONE pin, the PROM is enabled when the FPGA is not configured.
JP27 “USB CCLK ENABLE” – USB CCLK Enable, when installed enables the USB device to drive the configuration clock of the FPGA.
If using the USB device as the clock source, disable the PROM by removing the jumper on JP25 and make sure the jumper settings on
JP2 put the FPGA in a Slave configuration mode.
Default: Open, the FPGA or PROM provides the configuration clock.
JP28 “USB RS232 RX” – This signal is intended to be an output from the FPGA to either the RX Input of the EZUSB chip or the TXIN2
of the RS232 IC. Jumper on 2-3 connects the USB RX signal to the FPGA. Jumper on 1-2 connects RS232 signal TX2 to the FPGA.
Default: none; neither signal connected to the FPGA
JP29 “USB RS232 TX” – This signal is intended to be an input to the FPGA from either the TX output of the EZUSB chip or the
RXOUT2 of the RS232 IC. Jumper on 2-3 connects the USB TX signal to the FPGA. Jumper on 1-2 connects RS232 signal RX2 to
the FPGA.
Default: none; neither signal connected to the FPGA.
JP30 “Buzz Enable” – Connects “buzzer” net. Remove this jumper to disable the piezo buzzer.
Default: Installed, buzzer enabled.
JP31 “Prom Busy” – Connects net “prom_busy” to net “fpga_busy”. Support for a PROM errata which will likely be obsolete by the time
this document is published.
Default: Installed
The following figure illustrates the default placement of the jumpers installed on the Spartan-3 Development Board.
