CLEAR 39B OSCILLATOR FULL FREQUENCY RANGE PROBLEM
rightmost two octal digits
master clock chain
TABLE B
BINARY BITS
5 4 3 2 1 0
DC DC DC 0 0 1
DC DC DC 0 1 0
DC DC DC 1 0 0
DC DC 1 0 0 0
56 DUMP:NCLK 0, CREG
00000000 00100004 03600044 37760000 00006464 03670064 00000000 00000000
00000000 00100004 03600004 00000000 00000004 03600044 00000000 00000000
WORD 1
CONVERT TO BINARY
[8] Connect oscillator
POWER INPUT
opposite bay from suspect
oscillator (not master
oscillator) [TABLE B]
plug
P18
[9] At TTY, type
[11] See Note 1. Determine
[TABLE B]
[10] Convert to binary
[12] Select oscillator in
DUMP:NCLK 0,CREG
!
AND
Yes
[13] At selected oscillator chain
switch clockwise (
OS
and
OFF NORM
[6] Is voltage
[7] Clear
oscillator
power problem
No
b4.8V
and +5.2V
using SD-4A014-02
power switch, rotate
ROS/OFF
lamps light;
ACK
lamp lights
momentarily)
MASTER
CHAIN
0
1
2
3
NOTE 1
Network Clock
display may be used
to determine master
clock chain.
Otherwise use
procedure in
synchronization unit
(if operational)
Steps 9, 10, and 11
of word 1 [Figure 1]
Figure 1 — CREG Dump
TAP
PAGE 2 of 5
234-151-013
133
Issue 8
DEC 1995
