2.5.3
Interrupt assignments
Standard interrupt assignments
* These IRQs are usually available for PCI devices.
IRQ
Priority Standard function
0
1
System Timer
1
2
Keyboard Controller
2
–
Redirect to IRQ#9
4
12
Communications Port (COM1)*
5
13
IRQ Holder for PCI Steering*
6
14
Reserved
7
15
Reserved
8
3
System CMOS/Real Time Clock
9
4
IRQ Holder for PCI Steering*
10
5
IRQ Holder for PCI Steering*
11
6
IRQ Holder for PCI Steering*
12
7
Reserved
13
8
Numeric Data Processor
14
9
Primary IDE Channel
ICH
A
B
C
D
E
F
G
H
PCIE1_1
shared
–
–
–
–
–
–
LAN
–
–
shared
–
–
–
–
–
PCI_1
shared
–
–
–
–
–
–
–
USB controller 1
–
–
–
–
–
–
–
shared
USB controller 2
–
–
–
shared
–
–
–
–
USB controller 3
–
–
shared
–
–
–
–
–
USB controller 4
shared
–
–
–
–
–
–
–
USB controller 5
–
–
–
–
–
shared
–
–
USB controller 6
–
–
–
shared
–
–
–
–
USB 2.0 controller 1
–
–
–
–
–
–
–
shared
USB 2.0 controller 2
–
–
shared
–
–
–
–
–
SATA controller 1
–
–
–
–
shared
–
–
–
SATA controller 2
–
–
–
–
shared
–
–
–
Audio Azalia
–
–
–
–
–
–
shared
–
IRQ assignments for this motherboard
P45/MCH
24
25
26
27
28
29
30
31
PCIE16_1
shared
–
–
–
–
–
–
–
PCIE16_2
–
–
–
–
–
–
shared
–
2-26
Chapter 2: Hardware information
Summary of Contents for Maximus II Gene
Page 1: ...Motherboard Maximus II GENE ...
Page 30: ...2 2 Motherboard overview 2 2 1 Motherboard layout 2 6 Chapter 2 Hardware information ...
Page 57: ...Connect to 5 1 channel Speakers Connect to 7 1 channel Speakers ROG Maximus II GENE 2 33 ...
Page 120: ...3 46 Chapter 3 BIOS setup ...
Page 164: ...ROG Maximus II GENE Chapter summary 5 5 1 ATI CrossFireX technology 5 1 ...
Page 169: ...A Appendix Debug code table The Appendix lists the debug code table for the LCD Poster ...
Page 170: ...ROG Maximus II GENE Chapter summary A Debug code table A 1 ...
Page 174: ...A 4 Appendix Debug code table ...