ASEM BM1 Series, User Manual

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37 BM1xx User ’s guide
If DISABLED, goto ENABLE first then AUTO on next boot
ASPM
PCI Express Active State Power management Settings [Enabled] [Disabled]
L1 substates PCI Express L1 Substates settings [L1.1 & L1.2]
ACS Enable / Disable access control services extended capability [Enabled] [Disabled]
URR PCI express unsupported request reporting Enable/Disable [Enabled] [Disabled]
FER PCI express Device Fatal Error reporting Enable/Disable [Enabled] [Disabled]
NFER PCI express Device Non-Fatal Error reporting Enable/Disable [Enabled] [Disabled]
CER PCI express Device Correctable Error Reporting Enable/Disable [Enabled] [Disabled]
CTO PCI express Completion Timer T0 Enable/Disable [Enabled] [Disabled]
SEFE Root PCI express system err or on fatal error Enable / Disable [Enabled] [Disabled]
SENFE Root PCI express system error on Non-Fatal error Enable / Disable [Enabled] [Disabled]
SECE Root PCI express system error on Correctable Error Enable / Disable [Enabled] [Disabled]
PME SCI PCI Express PME SCI Enable / Disable [Enabled] [Disabled]
Hot Plug PCI Express Hot Plug Enable / Disable [Enabled] [Disabled]
PCIe Speed Configure PCIe Speed [Enabled] [Disabled]
Transmitter Half Swing Transmitter Half Swing Enable / Disable [Enabled] [Disabled]
Extra bus Reserved Extra bus Reserved for bridges behind this Root Bridge [0-7]
Reserved Memory Reserved memory and Prefetchable Memory Range for this Root Bridge [1-20MB]
Reserved I/O Reserved range for this Root Bridge [4K/8K/12K/16K/20K]
PCH PCIe LTR Configuration
PCH PCIE LTR PCH PCIE Latency Reporting [Enabled] [Disabled]
Snoop Latency Override
Snoop Latency Override for PCH PCIE
Disabled: Disable override.
Manual: Manually enter override values.
Auto (default): Maintain default BIOS flow
Non Snoop Latency Override
Non Snoop Latency Override for PCH PCIE
Disabled: Disable override.
Manual: Manually enter override values.
Auto (default): Maintain default BIOS flow
PCIE LTR Lock PCIE LTR Configuration Lock [Enabled] [Disabled]
PCIe Selectable De-emphasis When the link is operating at 5.0 GT/s speed, this bit selects the level of de-emphasis for an Up-
stream component.
1b-3,5 dB
0b-6 dB
[Enabled] [Disabled]
Table 22 - PCI Express Root Port 2
4.3.6.12 PCI Express Root Port 5
BIOS setting Function Configuration options
PCI Express Root Port 5
Control the PCI Express Root Port.
Auto: To disable unused root port automatically
for the most optimum power savings.
Enable: Enable PCIe root port
Disable: Disable PCIe root port
If DISABLED, goto ENABLE first then AUTO on next boot
ASPM
PCI Express Active State Power management Settings [Enabled] [Disabled]
L1 substates PCI Express L1 Substates settings [L1.1 & L1.2]
ACS Enable / Disable access control services extended capability [Enabled] [Disabled]
URR PCI express unsupported request reporting Enable/Disable [Enabled] [Disabled]
FER PCI express Device Fatal Error reporting Enable/Disable [Enabled] [Disabled]
NFER PCI express Device Non-Fatal Error reporting Enable/Disable [Enabled] [Disabled]
CER PCI express Device Correctable Error Reporting Enable/Disable [Enabled] [Disabled]
CTO PCI express Completion Timer T0 Enable/Disable [Enabled] [Disabled]
SEFE Root PCI express system err or on fatal error Enable / Disable [Enabled] [Disabled]
SENFE Root PCI express system error on Non-Fatal error Enable / Disable [Enabled] [Disabled]
SECE Root PCI express system error on Correctable Error Enable / Disable [Enabled] [Disabled]
PME SCI PCI Express PME SCI Enable / Disable [Enabled] [Disabled]
Hot Plug PCI Express Hot Plug Enable / Disable [Enabled] [Disabled]
PCIe Speed Configure PCIe Speed [Enabled] [Disabled]
Transmitter Half Swing Transmitter Half Swing Enable / Disable [Enabled] [Disabled]
Extra bus Reserved Extra bus Reserved for bridges behind this Root Bridge [0-7]
Reserved Memory Reserved memory and Prefetchable Memory Range for this Root Bridge [1-20MB]
Reserved I/O Reserved range for this Root Bridge [4K/8K/12K/16K/20K]
PCH PCIe LTR Configuration
PCH PCIE LTR PCH PCIE Latency Reporting [Enabled] [Disabled]
Snoop Latency Override
Snoop Latency Override for PCH PCIE
Disabled: Disable override.
Manual: Manually enter override values.
Auto (default): Maintain default BIOS flow
Non Snoop Latency Override
Non Snoop Latency Override for PCH PCIE
Disabled: Disable override.
Manual: Manually enter override values.
Auto (default): Maintain default BIOS flow
PCIE LTR Lock PCIE LTR Configuration Lock [Enabled] [Disabled]
PCIe Selectable De-emphasis When the link is operating at 5.0 GT/s speed, this bit selects the level of de-emphasis for an Up-
stream component.
1b-3,5 dB
0b-6 dB
[Enabled] [Disabled]
Table 23 - PCI Express Root Port 5
4.3.6.13 SATA Drives
BIOS setting Function Configuration options
Chipset SATA controller configuration
Chipset SATA Enables or Disables the Chipset SATA Controller. The Chipset SATA controller
supports the 2 black internal SATA ports (up to 3Gb/s supported per port).
[Enabled] [Disabled]
SATA Mode Selection Determines how SATA controller(s) operate [AHCI]