Artesyn MaxCore MC1600, Installation And Use Manual, Page: 52 / 118

50 MC1600 Extreme Edge Server Installation and Use (6806870A02A)
System Overview
System Overview
1.8.3 Synchronous Ethernet and IEEE 1588 Support
1.8.3.1 Synchronous Ethernet PLL
The Extreme Edge Server has a Synchronous Ethernet (SyncE) PLL device on board that allows
a recovered clock from one SFP+ port to be used as the Ethernet timing reference for the
Ethernet switch. This allows the other SFP+ ports to be synchronized to this timing reference.
The diagram below shows the SyncE clocking architecture.
The SyncE PLL has a free-running oscillator that can be used to generate a reference clock when
no recovered clock is available. When it is desired to use a recovered clock, the ports used for
primary and secondary clock recovery can be set up in the control registers of the Ethernet
switch. The primary and secondary recovered clocks go to the input multiplexer of the SyncE
PLL. The clock valid signals go to the input selection logic of the SyncE PLL chip. In addition, the
SyncE PLL chip has internal monitoring circuits to evaluate the quality of the incoming clocks,
and it can be set up for hitless, automatic switching between the primary and secondary
recovered clocks. It also supports holdover mode in case the recovered clocks are temporarily
lost.
The SyncE PLL can store up to four configurations (0-3). By default, configuration 0 is the only
one programmed and is loaded at power-on. Other configurations (1 - 3)
could be
programmed into the device and selected via a register in the Glue CPLD. Upon the next
payload reset, the selected configuration would be loaded. The Glue CPLD retains this
selection as long as management power is present.
Figure 1-6 Synchronous Ethernet Clocking Architecture