Artesyn ATCA-7475, Installation And Use Manual

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Maps and Registers
ATCA-7475 Installation and Use (6806800S38D)
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6.2 FPGA Registers
The programmable logic required on ATCA-7475 resides in an FPGA. It implements special
functions as follows:

LPC Bus Interface

SPI interface connected to IPMC and SPI bit-stream flashes

Reset controller

Interrupt Masking, Routing, and support of SERIRQ

Serial Line Routing

Telecom Clock Supervision Unit

Miscellaneous Registers (Post Code Register, Version Register)

SPI boot flash control, Boot device selection control

Support of several board control / status signals

Port80 7Seg-Debug Led control

COM Port routing:
– Port 1: Faceplate or RTM
– Port 2: IPMC Serial over LAN
Some of the internal functions are connected to the LPC bus via the corresponding bus
interface to the internal local bus and some other internal functions are connected to the IPMC
SPI interface.
For re usability reasons, the programmable logic is written in Verilog HDL. For details, refer to
the ATCA-7475 Glue Logic FPGA Design Specification.