Artesyn Embedded Technology ATCA-7490, Installation And Use Manual

Page: 143 / 372

Maps and Registers
ATCA-7490 Installation and Use (6806800U11F)
143
The table below shows all possible failing states and their coding. When the board is powered
via switch SW100.1, the debug mode is enabled, where some timeouts are disabled. With
debug mode enabled, the failure transition to SHUTDOWN is disabled for the states
CLK_ENABLE, WAIT_100MS and S0. Nevertheless, the failing state and the failing causes are
latched.
7 Payload Power Failure. Payload Power state
machine sampled a failing Payload Power status:
0: No Payload Power Failure. Normal Payload
operation.
1: Payload Power failure. Payload Power failure
detected. PWR_GOOD:0 IPMC: r
Table 5-50 Payload Power Failure States
State
Coding State
Name
Description
0x2 CLK_ENABLE One or more voltages have failed, which have been already
enabled and sampled good.
0x5 S0 One or more voltages have failed, which have been already
enabled and sampled good.
Other cause: Thermtrip
0x6 S3 One or more of these voltages have failed:
12V, 5V aux, VPP or VDD.
0x8 TRACK_MASTE
R_ON Timeout (debug disabled) after 280ms. Tracked voltages are
not good.
Other cause: 12V or 5V aux power failure.
0x9 VCCIN_ENABL
E Timeout (debug disabled) after 280ms. VCCIN voltages are
not good.
Other cause: One or more voltages have failed, which have
been already enabled and sampled good.
Table 5-49 Payload Power Failure State Register (continued)
Address Offset: 0x0A
Bit Description Default Access