Functional Description
SharpStreamer™ Pro Mini PCIE-7210-1 Installation and Use (6806800U78A
)
46
3.10 Reset Management
PEX9716 switch and PCH resets are controlled by the CPLD. CPU and Peripheral reset are
controlled by PCH. During power up the CPLD state machine drives the reset control to CPU
during an induced reset from the front panel reset switch.
For more information about Reset button, refer the section
.
3.11 JTAG
Joint Test Action Group (JTAG) pins are mapped to the CPLD JTAG programming pins.
CPLD programming port at connector P2 (independent connector for CPLD)
E3-1578L v5 and PCH JTAG pins are connected to eXtended Debug Port (XDP) connector
Summary of Contents for 6806800U78A
Page 1: ...SharpStreamer Pro Mini PCIE 7210 1 Installation and Use P N 6806800U78A December 2017 ...
Page 8: ...SharpStreamer Pro Mini PCIE 7210 1 Installation and Use 6806800U78A 8 List of Tables ...
Page 10: ...SharpStreamer Pro Mini PCIE 7210 1 Installation and Use 6806800U78A 10 List of Figures ...
Page 20: ...SharpStreamer Pro Mini PCIE 7210 1 Installation and Use 6806800U78A Safety Notes 20 ...
Page 24: ...SharpStreamer Pro Mini PCIE 7210 1 Installation and Use 6806800U78A Sicherheitshinweise 24 ...
Page 30: ...Introduction SharpStreamer Pro Mini PCIE 7210 1 Installation and Use 6806800U78A 30 ...
Page 80: ...PCIE Software SharpStreamer Pro Mini PCIE 7210 1 Installation and Use 6806800U78A 80 ...
Page 92: ...Related Documentation SharpStreamer Pro Mini PCIE 7210 1 Installation and Use 6806800U78A 92 ...
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