Cyclone 10 LP RefKit User Guide
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Page | 52
February 2022
5.2.8.6
Clic “ ”
5.2.8.7
Do the same for input buses of the mux:
Name the top bus input:
data1x[7..0]
→
counter[24..31]
Name the bottom bus input:
data0x[7..0]
→
counter[19..26]
Schematic should look like this: