Cyclone 10 LP RefKit User Guide
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Page | 15
February 2022
Board Reference FPGA Pin No.
Pin Func.
Description
I/O Std
ETH1_RXDV
PIN_W21
Bidir
MII Receive Data Valid
3.3 V
ETH1_RST
PIN_R19
Output
Chip Reset
3.3 V
ETH1_INTRP
PIN_U22
Bidir
Interrupt
3.3 V
ETH1_RXC
PIN_V22
Bidir
MII Receive Clock
3.3 V
ETH1_RXER
PIN_V21
Bidir
MII Receive Error
3.3 V
ETH1_RXD0
PIN_W22
Bidir
MII Receive Data D[0]
3.3 V
ETH1_RXD1
PIN_W20
Bidir
MII Receive Data D[1]
3.3 V
ETH1_RXD2
PIN_Y21
Bidir
MII Receive Data D[2]
3.3 V
ETH1_RXD3
PIN_Y22
Bidir
MII Receive Data D[3]
3.3 V
ETH1_TXC
PIN_U21
Bidir
MII Transmit Clock
3.3 V
ETH1_TXEN
PIN_T18
Output
MII Transmit Enable
3.3 V
ETH1_TXD0
PIN_T17
Output
MII Transmit Data D[0]
3.3 V
ETH1_TXD1
PIN_U20
Output
MII Transmit Data D[1]
3.3 V
ETH1_TXD2
PIN_U19
Output
MII Transmit Data D[2]
3.3 V
ETH1_TXD3
PIN_T20
Output
MII Transmit Data D[3]
3.3 V
ETH2_MDIO
PIN_N20
Bidir
Management Interface Data
3.3 V
ETH2_MDC
PIN_N18
Output
Management Interface Clock
3.3 V
ETH2_COL
PIN_P21
Bidir
MII Collision Detect
3.3 V
ETH2_CRS
PIN_P22
Bidir
MII Carrier Sense
3.3 V
ETH2_RXDV
PIN_R18
Bidir
MII Receive Data Valid
3.3 V
ETH2_RST
PIN_M21
Output
Chip Reset
3.3 V
ETH2_INTRP
PIN_N17
Bidir
Interrupt
3.3 V
ETH2_RXC
PIN_R17
Bidir
MII Receive Clock
3.3 V
ETH2_RXER
PIN_P17
Bidir
MII Receive Error
3.3 V
ETH2_RXD0
PIN_M20
Bidir
MII Receive Data D[0]
3.3 V
ETH2_RXD1
PIN_M19
Bidir
MII Receive Data D[1]
3.3 V
ETH2_RXD2
PIN_M16
Bidir
MII Receive Data D[2]
3.3 V
ETH2_RXD3
PIN_N19
Bidir
MII Receive Data D[3]
3.3 V
ETH2_TXC
PIN_N16
Bidir
MII Transmit Clock
3.3 V
ETH2_TXEN
PIN_R22
Output
MII Transmit Enable
3.3 V
ETH2_TXD0
PIN_R21
Output
MII Transmit Data D[0]
3.3 V
ETH2_TXD1
PIN_N21
Output
MII Transmit Data D[1]
3.3 V
ETH2_TXD2
PIN_M22
Output
MII Transmit Data D[2]
3.3 V
ETH2_TXD3
PIN_N22
Output
MII Transmit Data D[3]
3.3 V
3.3.3
Serial Configuration Flash Memory
The C10LP RefKit board is integrated with a 16MBit of serial flash memory that can be used for
user data and programming non-volatile storage. The configuration bitstream is downloaded into
the serial configuration device which automatically loads the configuration data into the Cyclone
10 LP when the board is powered on. Device memory capacity not consumed storing
configuration data can be used as general-purpose non-volatile memory, which is perfect for
program and data storage. Several interfaces available with Nios II embedded processors allow
you to access the serial configuration device as a memory module connected to your embedded
system.
