Altera Nios II, Hardware Development Manual

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1–26 Chapter 1: Nios II Hardware Development
Creating the Design Example
Nios II Hardware Development Tutorial May 2011 Altera Corporation
Figure 1–14 shows the completed .bdf schematic using the LED pins.
Add IP Variation File
In this section, you add the Quartus II IP File ( .qip ) to the your Quartus II project. To
add the .qip , perform the following steps:
1. On the Assignments menu, click Settings . The Settings dialog box appears.
2. Under Category , click Files . The Files page appears.
3. Next to File name , click the browse ( ... ) button.
4. In the Files of type list, select Script Files (*.tcl, *.sdc, *.qip) .
5. Browse to locate <design files directory> /first_nios2_system/synthesis/
first_nios2_system.qip and click Open to select the file.
6. Click Add to include first_nios2_system.qip in the project.
7. Click OK to close the Settings dialog box.
Assign FPGA Device and Pin Locations
In this section, you assign a specific target device and then assign FPGA pin locations
to match the pinouts of your board.
1
You must know the pin layout for the board to complete this section. You also must
know other requirements for using the board, which are beyond the scope of this
document. Refer to the documentation for your board.
f
For Altera development board reference manuals, refer to the Literature:
Development Kits page of the Altera website .
To assign the device, perform the following steps:
1. On the Assignments menu, click Device . The Device dialog box appears.
Figure 1–14. Completed Board Design File Schematic