ADM-
XP
User Manual
ADM-XR-IIPro User Manual
Page 23 of 29
Version 0.2
9.5.3 Ethernet
MAC
All of these signals use VCCFPIO signalling levels. The VCCO selected by the jumper on the XRC-II/XPL
should match the IOSTANDARD for these pins.
FPGA XRM-ETH
Bank Pin Samtec
MAC
Signal
Comment
1 H20 62 RXC
O-ST
1 G20 64 TXC
O-ST
1 F15 66 PD I
1 E15 68 TXER I
1 C19 90 RXDV
O-PD
0 G22 97 RXD3
O-PD
0 F22 99 RXD2
O-PD
1 D19 92 RXD1
O-PD
0 E28 94 RXD0
O-PD
0 F28 96 TXEN I
0 C29 98 TXD0 I
0 C28 100 TXD1 I
0 J22 102 TXD2 I
0 K22 104 TXD3 I
0 L27 106 COL
O-PD
0 K27 107 CRS
O-PD
1 E13 18 MDC
I-PU
1 F13 20 MDIO
IO-PU
1 K13 26 RST_N
I-PU
1 J13 28 RXER
O
Key
I Input
O Output
O-PD Output with 2K pulldown
O-ST Output with 25R source resistor
9.5.4 RS232
FPGA XRM-ETH
Bank Pin Samtec
J4
Header
Signal
0 C30 122 1 TX0
0 D30 124 3 RX0
0 M26 126 7 TX1
0 M25 128 9 RX1
The header pin-out is show below.
Signal Pin Samtec
Signal
GND 2 1 TX0
GND 4 3 RX0
POL 6 5 NC
GND 8 7 TX1
GND 10 9 RX1
