ADM-XRC-7V1 User Manual
V1.9 - 23rd Aug 2016
3.1.2 LED Definitions
The position and description of the board status LEDs are shown in
D7
Status 1
D8
Status 2
D9
Target Done
D10 Bridge Done
D11 Bridge-Bypass
D12 Bridge-Less
D
1
3
N
V
M
R
O
D
1
4
X
M
C
J
TA
G
Figure 2 : LED Locations
Comp. Ref.
Function
ON State
Off State
D7(Red)
Status 1
D8(Green)
Status 2
D9(Green)
Target Done
Target FPGA is configured
Target FPGA is unconfigured
D10(Green)
Bridge Done
Bridge FPGA is configured
Bridge FPGA is unconfigured
D11(Amber)
Bridge Bypass
Bridge FPGA is bypassed - PCIe lanes
(3:0) are connected directly to the user
FPGA
Bridge FPGA is used. PCIe lanes (3:0)
are connected to the bridge.
D12(Amber)
Bridge-Less
Target is configured through Auxiliary
SPI memmory
Target is configured by Bridge
D13(Amber)
NVMRO
Inhibit writes to non-volatile memories
Enable writes to non-volatile memories
D14(Amber)
XMC JTAG
On-board JTAG chain connected to P5
On-board JTAG chain is isolated from
P5
Table 3 : LED Definitions
Page 6
Functional Description
ad-ug-1248_v1_9.pdf
