ADM-SDEV-BASE/XCKU060 User Manual
V1.0 - 27th November 2018
3.8 FMC Interfaces
The ADA-SDEV-BASE board has 3 FMC sockets, J1, J2 and J3. Their interfaces are described below.
3.8.1 Low Pin Count (LPC) FMC, J1
Connector J1 is for general purpose IO.
Group
FPGA
Bank
Name
Function
FMC1_LA_0
44
FMC1_LA(16:2)
15 diff. Pairs / 30 single-ended
FMC1_LA_CC (1:0)
2x Regional Clocks / GPIO pairs / 4 single-ended
FMC1_LA_1
45
FMC1_LA(33:19)
15 diff. Pairs / 30 single-ended
FMC1_LA_CC (18:17)
2x Regional Clocks / GPIO pairs / 4 single-ended
Table 14 : LPC FMC Groups (J1)
3.8.2 Configuration FMC, J2
Connector J2 is used for the FPGA configuration interface plus also for general purpose IO.
Group
FPGA
Bank
Name
Function
CONFIG
0,65
Various
FPGA Configuration Interface
FMC2_LA_0
24
FMC2_LA(16:2)
15 diff. Pairs / 30 single-ended
FMC2_LA_CC (1:0)
2x Regional Clocks / GPIO pairs / 4 single-ended
FMC2_LA_1
64
FMC2_LA(33:19)
15 diff. Pairs / 30 single-ended
FMC2_LA_CC (18:17)
2x Regional Clocks / GPIO pairs / 4 single-ended
Table 15 : Config FMC Groups (J2)
3.8.3 High Pin Count FMC+, J3
Connector J3 is used for general purpose IO.
Group
FPGA
Bank
Name
Function
FMC3_LA_0
46
FMC3_LA(16:2)
15 diff. Pairs / 30 single-ended
FMC3_LA_CC (1:0)
2x Regional Clocks / GPIO pairs / 4 single-ended
FMC3_LA_1
47
FMC3_LA(33:19)
15 diff. Pairs / 30 single-ended
FMC3_LA_CC (18:17)
2x Regional Clocks / GPIO pairs / 4 single-ended
FMC3_HA_0
25,46
FMC3_HA(16:2)
15 diff. Pairs / 30 single-ended
FMC3_HA_CC (1:0)
2x Regional Clocks / GPIO pairs / 4 single-ended
FMC3_HA(23:18)
6 diff. Pairs / 12 single-ended
FMC3_HA_CC (17)
Regional Clock / GPIO pair / 2 single-ended
FMC3_HB_0
48
FMC3_HB(5:1)
5 diff. Pairs / 10 single-ended
Table 16 : FMC+ Groups (J3) (continued on next page)
Page 18
Functional Description
ad-ug-1360_v1_0.pdf
