Albalá Ingenieros | Manual
IPA3000C01
STR2_IGM_F_ADD_0
0x00
0xA7
0xFF
Y
N
Source IP address (0) (IP reserve RX)
= x
STATUS
Name
add
ext
msk
snmp trap
Description
1PPS_FAIL
0x01
0x01
Y
Y
1PPS reference input status
0=OK,1=Fail
10MHZ_FAIL
0x01
0x02
Y
Y
10MHz reference input status
0=OK,1=Fail
OUTPUT_FAIL
0x01
0x08
Y
Y
The output signal is not valid because all inputs failed
0=OK,1=Fail
ASI_MAIN_DEL_WAR
0x01
0x10
Y
Y
The ASI main delay is greater than the programmed output delay
0=OK,1=Fail
ASI_RES_DEL_WAR
0x01
0x20
Y
Y
The ASI reserve delay is greater than the programmed output delay
0=OK,1=Fail
IP_MAIN_DEL_WAR
0x01
0x40
Y
Y
The IP main delay is greater than the programmed output delay
0=OK,1=Fail
IP_RES_DEL_WAR
0x01
0x80
Y
Y
The IP reserve delay is greater than the programmed output delay
0=OK,1=Fail
ASI_MAIN_FAIL
0x02
0x01
Y
Y
ASI main input status
0=OK,1=Fail
EX_ASI_MAIN_FAIL
0x02
0x02
Y
Y
ASI main external input fail status
0=OK,1=Fail
ASI_RES_FAIL
0x02
0x04
Y
Y
ASI reserve input status
0=OK,1=Fail
EX_ASI_RES_FAIL
0x02
0x08
Y
Y
ASI reserve external input fail status
0=OK,1=Fail
IP_MAIN_FAIL
0x02
0x10
Y
Y
IP main input status
0=OK,1=Fail
EX_IP_MAIN_FAIL
0x02
0x20
Y
Y
IP main external input fail status
0=OK,1=Fail
IP_RES_FAIL
0x02
0x40
Y
Y
IP reserve input status
0=OK,1=Fail
EX_IP_RES_FAIL
0x02
0x80
Y
Y
IP reserve external input fail status
0=OK,1=Fail
ASIM_ASIR_SEAM
0x03
0x01
Y
N
ASI main to ASI reserve seamles switching capability
0=Seamless, 1=No seamless
ASIM_IPM_SEAM
0x03
0x02
Y
N
ASI main to IP main seamles switching capability
0=Seamless, 1=No seamless
ASIM_IPR_SEAM
0x03
0x04
Y
N
ASI main to IP reserve seamles switching capability
0=Seamless, 1=No seamless
ASIR_IPM_SEAM
0x03
0x08
Y
N
ASI reserve to IP main seamles switching capability
0=Seamless, 1=No seamless
ASIR_IPR_SEAM
0x03
0x10
Y
N
ASI reserve to IP reserve seamles switching capability
0=Seamless, 1=No seamless
IPM_IPR_SEAM
0x03
0x20
Y
N
IP main to IP reserve seamles switching capability
0=Seamless, 1=No seamless
GLOBAL_SEAM
0x03
0x80
Y
Y
Global seamles switching capability
0=Seamless, 1=No seamless
ASI_MAIN_DELAY
0x04
0xFF
Y
N
DVB-T mode: input delay refered to 1PPS reference, No DVB-T mode: input to
output delay
= 6.5536*x ms
ASI_RES_DELAY
0x05
0xFF
Y
N
DVB-T mode: input delay refered to 1PPS reference, No DVB-T mode: input to
output delay
= 6.5536*x ms
IP_MAIN_DELAY
0x06
0xFF
Y
N
DVB-T mode: input delay refered to 1PPS reference, No DVB-T mode: input to
output delay
= 6.5536*x ms
IP_RES_DELAY
0x07
0xFF
Y
N
DVB-T mode: input delay refered to 1PPS reference, No DVB-T mode: input to
output delay
= 6.5536*x ms
IP_RX_ADDRESS_3
0x08
0xFF
Y
N
RX packets source IP address (3)
= x
IP_RX_ADDRESS_2
0x09
0xFF
Y
N
RX packets source IP address (2)
= x
IP_RX_ADDRESS_1
0x0A
0xFF
Y
N
RX packets source IP address (1)
= x
IP_RX_ADDRESS_0
0x0B
0xFF
Y
N
RX packets source IP address (0)
= x
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