[AKD4114-B]
[KM076604]
2009/08
- 6 -
b-1. MCKO1/MCKO2
The output of MCKO1 pin or MCKO2 pin can be selected by JP12. The output frequency of
MCKO1/MCKO2 sets up by OCKS 1-0.
Output
signal
JP12
MCKO1 MCKO1 Default
MCKO2 MCKO2
Table 12. Selection of MCKO1/MCKO2
OCKS1 pin
(SW3_2)
OCKS0 pin
(SW3_3)
OCKS1 bit
OCKS0 bit
(X’tal) MCKO1 MCKO2 fs
(max)
0 0
256fs
256fs
256fs
96
kHz
Default
0 1
256fs
256fs
128fs
96
kHz
1 0
512fs
512fs
256fs
48
kHz
1 1
128fs
128fs
64fs
192
kHz
Table 13. Master Clock Frequency Select
b-2. Set-up of input/output of BICK and LRCK
Please set up SW 3_8 (DIT_I/O) according to the setup of audio format of AK4114 (Refer to Table 20).
JP16 and 17 should be fixed to the “DC” side.
Audio format
SW3_8 (DIT_I/O)
Slave mode
0
Default
Master mode
1
Table 14. Set-up of DIT_I/O
c.
Set-up of audio data format
Please refer to Table 7.
d.
Set-up of CM1 and CM0
CM1 pin
(SW3_1)
CM0 pin
(JP18)
CM1 bit
CM0 bit
(UNLOCK)
PLL
X'tal Clock
source
SDTO
source
0 0 - ON
ON(Note)
PLL(RX)
RX
Default
0 1 -
OFF
ON X'tal
DAUX
0 ON
ON PLL(RX)
RX
1 0
1 ON
ON X'tal
DAUX
1 1 - ON
ON X'tal
DAUX
ON: Oscillation (Power-up), OFF: STOP (Power-Down)
Note: When the X’tal is not used as clock comparison for fs detection (XTL0, 1= “1,1”), the X’tal is OFF.
Table 15. Clock Operation Mode Select
Summary of Contents for AKD4114-B
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