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AKM AKD4114-B, Manual

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AKM AKD4114-B Manual Download Page 17

  

[AKD4114-B] 

[KM076604]  

2009/08 

- 17 -

1.  [REG]: Register Map 
 

This tab is for a register writing and reading. 

 

Each bit on the register map is a push-button switch.  
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).  
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray) 

 

Grayout registers are Read Only registers. They can not be controlled.  

 

The registers which is not defined in the datasheet are indicated as “---”. 

 

 

Figure 12. Window of [ REG] 

 
 

Summary of Contents for AKD4114-B

Page 1: ...h this The control software does not operate on Windows NT FUNCTION Digital interface S PDIF 8 channel input optical or BNC 2 channel output optical or BNC Serial audio data I F 1 input output for DIR deta output DIT data input 10 pin port B C U V bit 1 input output port 10 pin port Serial control data I F 1 input output port 10 pin port RX0 RX1 AK4114 B C U V Control 5V GND Opt RX7 TX0 Serial Dat...

Page 2: ...ICK LRCK SDTO AK4114 DIR AKD4114 B DAC MCLK BICK LRCK SDTO The DIR generates MCLK BICK LRCK and SDATA from the received data through optical connector PORT1 TORX176 or BNC connector The AKD4114 B can be connected with the AKM s DAC evaluation board via 10 line cable a Set up of Bi phase Input RX0 and RX1 7 should not select BNC at the same time a 1 RX0 Connector JP2 RXP0 JP3 RXN0 Optical PORT1 OPT...

Page 3: ...put The signal level outputted inputted from PORT2 is 3 3V PORT2 DIR 5 6 1 10 GND GND GND GND GND MCLK BICK LRCK SDTO DAUX Figure 2 PORT2 pin layout b 1 MCKO1 MCKO2 The output of MCKO1 pin or MCKO2 pin can be selected by JP12 The output frequency of MCKO1 MCKO2 is selected by OCKS 1 0 Output signal JP12 MCKO1 MCKO1 Default MCKO2 MCKO2 Table 4 Set up of MCKO1 MCKO2 OCKS1 pin SW3_2 OCKS0 pin SW3_3 O...

Page 4: ...t Left justified 24bit Right justified H L O 64fs O 4 1 0 0 24bit Left justified 24bit Left justified H L O 64fs O 5 1 0 1 24bit I2 S 24bit I2 S L H O 64fs O 6 1 1 0 24bit Left justified 24bit Left justified H L I 64 128fs I Default 7 1 1 1 24bit I2 S 24bit I2 S L H I 64 128fs I Table 7 Audio format d Set up of CM1 and CM0 The operation mode of PLL is selected by CM1 and CM0 In parallel mode it ca...

Page 5: ...PS12 10 bit Connector JP19 TX1 JP14 TX1 Optical PORT4 OPT BNC BNC J4 BNC BNC Table 9 Set up of TX1 a 2 As for TX0 only the loop back mode of RX corresponds This mode is fixed to RX0 in parallel mode In serial mode it can be selected by OPS02 00 bits Connector JP13 TX0 JP19 TXP1 JP14 TXN1 Optical PORT4 OPT Open BNC BNC J4 BNC Open BNC Table 10 Set up of TX0 b Set up of clock input and output The us...

Page 6: ...output of BICK and LRCK Please set up SW 3_8 DIT_I O according to the setup of audio format of AK4114 Refer to Table 20 JP16 and 17 should be fixed to the DC side Audio format SW3_8 DIT_I O Slave mode 0 Default Master mode 1 Table 14 Set up of DIT_I O c Set up of audio data format Please refer to Table 7 d Set up of CM1 and CM0 CM1 pin SW3_1 CM0 pin JP18 CM1 bit CM0 bit UNLOCK PLL X tal Clock sour...

Page 7: ... IBM AT compatible PC Connect PORT6 uP I F with PC by 10 line flat cable packed with the AKD4114 B Take care of the direction of connector There is a mark at pin 1 The pin layout of PORT6 is as Figure 5 Mode SW1_6 JP18 4 wire Serial L CDTO CM0 H IIC H SDA and CM0 L Note Note In IIC mode the chip address is fixed to 01 Table 16 Set up of Parallel mode and Serial mode PORT6 uP I F 10 9 2 1 NC CDTO C...

Page 8: ...mode Set up of IIC pin in serial mode L 4 wire Serial H IIC OFF 6 P SN Set up of P SN pin L Serial mode H Parallel mode OFF 7 TEST Don t care OFF 8 ACKS Don t care OFF DIP switch SW3 set up off means L No Switch Name Function Default 1 CM1 Set up of CM1 pin in parallel mode OFF 2 OCKS1 Set up of OCKS1 pin in parallel mode OFF 3 OCKS0 Set up of OCKS0 pin in parallel mode OFF 4 PSEL Don t care OFF 5...

Page 9: ... circuit 7 8 9 10 RX4 7 RX4 7 set up depending serial parallel mode RX4 7 Serial mode default DIF2 0 IPS0 Parallel mode 11 12 DIR MCLK DIT MCLK MCKO set up for PORT5 DIT and PORT2 DIR MCKO1 MCKO1 of AK4114 default MCKO2 MCKO2 of AK4114 13 TX0 Set up of TX0 output circuit OPT Optical BNC BNC default 18 SDA CDTO Set up of SDA CDTO pin 4 wire Serial CDTO CM0 H default IIC SDA 19 TXP1 Set up of TXP1 i...

Page 10: ...irection of the 10pin header When running this control soft on the Windows 2000 XP the driver which is included in the CD must be installed Refer to the Driver Control Install Manual for AKM Device Control Software for installing the driver When running this control soft on the windows 95 98 ME driver installing is not necessary This control soft does not support the Windows NT 3 Proceed evaluatio...

Page 11: ...ing When the device is reset by a hardware reset use this button to initialize the registers 3 All Write Executing write commands for all registers displayed 4 All Read Executing read commands for all registers displayed 5 Save Saving current register settings to a file 6 Load Executing data write from a saved file 7 All Req Write All Req Write dialog box is popped up 8 Data R W Data R W dialog bo...

Page 12: ...er writings Writings are executed in descending order Help Help window is popped up Save Saving the register setting file assignment The file name is mar Open right Opening a saved register setting file assignment mar Close Closing the dialog box and finish the process Operating Suggestions 1 Those files saved by Save button and opened by Open button on the right of the dialog mar should be stored...

Page 13: ...dress in hexadecimal numbers for data writing Data Box Input data in hexadecimal numbers Mask Box Input mask data in hexadecimal numbers This is AND processed input data Write Writing to the address specified by Address box Close Closing the dialog box and finish the process Data writing can be cancelled by this button instead of Write button The register map will be updated after executing Write ...

Page 14: ... down menu No_use Not using this address Register Register writing Reg Mask Register writing Masked Interval Taking an interval Stop Pausing the sequence End Finishing the sequence 2 Input sequence Address Data address Data Writing data Mask Mask Data box data is ANDed with Mask box data This is the actual writing data When Mask 0x00 current setting is hold When Mask 0xFF the 8bit data which is se...

Page 15: ... file name is aks Open Opening a sequence setting file aks Close Closing the dialog box and finish the process Stop of the sequence When Stop is selected in the sequence processing is paused and it starts again when Start button is clicked Restarting step number is shown in the Start Step box When finishing the process until the end of sequence Start Step will return to 1 The sequence can be start...

Page 16: ... are executed in descending order Help Pop up the help window Save Saving sequence setting file assignment The file name is mas Open right Opening a saved sequence setting file assignment mas Close Closing the dialog box and finish the process Operating Suggestions 1 Those files saved by Save button and opened by Open button on the right of the dialog mas should be stored in the same folder 2 When...

Page 17: ...n switch Button Down indicates H or 1 and the bit name is in red when read only it is in deep red Button Up indicates L or 0 and the bit name is in blue when read only it is in gray Grayout registers are Read Only registers They can not be controlled The registers which is not defined in the datasheet are indicated as Figure 12 Window of REG ...

Page 18: ...rite setting value to the registers or click Cancel to cancel this setting Figure 13 Window of Register Set Read Data Read Click Read button located on the right of the each corresponded address to execute register reading After register reading the display will be updated regarding to the register status Button Down indicates H or 1 and the bit name is in red when read only it is in deep red Butt...

Page 19: ...er intended nor authorized for use as critical componentsNote1 in any safety life support or other hazard related device or systemNote2 and AKM assumes no responsibility for such use except for the use approved with the express written consent by Representative Director of AKM As used here Note1 A critical component is one whose failure to function or perform may reasonably be expected to result w...

Page 20: ...5 0 1u U7 AK4114 IPS0 RX4 1 AVSS 2 DIF0 RX5 3 TEST2 4 DIF1 RX6 5 AVSS 6 DIF2 RX7 7 IPS1 IIC 8 P SN 9 XTL0 10 XTL1 11 TVDD 13 NC 14 TX0 15 TX1 16 BOUT 17 COUT 18 UOUT 19 VOUT 20 DVDD 21 DVSS 22 MCKO1 23 BICK 26 MCKO2 27 DAUX 28 XTO 29 XTI 30 PDN 31 CM0 CDTO CAD1 32 CM1 CDTI SDA 33 OCKS1 CCLK SCL 34 OCKS0 CSN CAD0 35 INT0 36 AVDD 38 R 39 VCOM 40 AVSS 41 RX0 42 AVSS 43 RX1 44 TEST1 45 RX2 46 AVSS 47 ...

Page 21: ...4 A3 5 A4 6 A5 7 A6 8 A7 9 B0 18 B1 17 B2 16 B3 15 B4 14 B5 13 B6 12 B7 11 DIR 1 OE 19 U3 74AC245 U3 74AC245 C13 0 1u C13 0 1u C4 0 1u C4 0 1u 1 2 U2A 74HC14 U2A 74HC14 R4 short R4 short C16 0 1u C16 0 1u C2 0 1u C2 0 1u R15 100 R15 100 JP12 DIR_MCLK JP12 DIR_MCLK D1 1S1588 D1 1S1588 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CN2 CN2 R23 100k R23 100k JP10 JP10 R20 100 R20 100 C11 47u C11 47u JP5 JP5 ...

Page 22: ...0 1u C17 0 1u R37 150 R37 150 R55 470 R55 470 R28 100 R28 100 LE2 INT1 LE2 INT1 R59 100 R59 100 5 6 U2C 74HC14 U2C 74HC14 R51 10k R51 10k R25 100 R25 100 1Y 4 2Y 7 3Y 9 4Y 12 1A 2 1B 3 2A 5 2B 6 3A 11 3B 10 4A 14 4B 13 G 15 A B 1 U5 74LVC157 U5 74LVC157 R45 1k R45 1k R53 100 R53 100 R54 10k R54 10k R33 1k R33 1k 9 8 U2D 74HC14 U2D 74HC14 1 2 3 4 5 6 7 8 9 RP2 47k RP2 47k R50 100 R50 100 1 3 5 2 4 ...

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