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Advantech SOM-4450 Series, Design Manual

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Advantech SOM-ETX Design Guide 

 

IDE device as DMA Ready . In write cycle, IDE Bus master 
will drive this signal as Data Strobe(DSTROBE) to use by 
IDE device to strobe the output data. 

D54 
D51 

PIDE_IOW# 
SIDE_IOW# 

O 

IDE_IOW# Command. This is the IOW# command output pin 
to notify the IDE device that the available Write Data is 
already asserted by IDE-Bus-master in PIO and DMA mode. 
In Ultra-33 mode, this pin is driven by IDE-Bus-master to 
force IDE device to terminate current transaction. After 
receiving this input, IDE device will de-assert DRQ to STOP 
current transaction. 

D39 

PIDE_INTRQ  

I Interrupt 

signal. 

D98 

HDRST# 

O 

Low active hardware reset (RSTISA inverted). 

D28 

DASP-S#0 
 

O 

Time-multiplexed, open collector output which indicates that 
a drive is active, or that a slave drive is present on 
Secondary IDE channel. Necessary for using IDE 
master/slave-mode on Secondary IDE channel. This signal 
is only used, if an SOM-ETX onboard IDE master exist.  

D35 

PDIAG-S 
 

O 

Output by the drive if it is configured in the slave mode; input 
to the drive if it is configured in the master mode. The signal 
indicates to a master that the slave has passed its internal 
Diagnostic command. Necessary for using IDE master/slave-
mode on Secondary IDE channel. This signal is only used, if 
an SOM-ETX onboard IDE master exist.  

D44 

SIDE_INTRQ  

 
 
 
 

 

Chapter 5  Carrier Board Design Guidelines 

85 

 

Summary of Contents for SOM-4450 Series

Page 1: ...Advantech SOM ETX Series System On Modules Design Guide Version 1 0...

Page 2: ...f their respective owners The product specifications design and this user s manuals content are subject to change without notice If you have any questions please contact your merchant or our service c...

Page 3: ...2 5 SOM 4470 22 Figure 2 8 SOM 4470 Block Diagram 22 Table 2 6 SOM 4470 Specifications 23 2 2 6 SOM 4451 24 Figure 2 9 SOM 4451 Block Diagram 24 Table 2 7 SOM 4451 Specifications 25 2 2 7 SOM 4450 26...

Page 4: ...2 41 Power Consumption SOM 4481 42 Table 2 42 Power Consumption SOM 4475 43 Table 2 43 Power Consumption SOM 4472 43 Table 2 44 Power Consumption SOM 4470 43 Table 2 45 Power Consumption SOM 4451 44...

Page 5: ...Design Guidelines 61 5 1 PCI Bus 61 5 1 1 Signal Description 61 Table 5 1 PCI Signal Description 61 5 1 2 Design Guidelines 62 Table 5 2 Carrier PCI Slots Devices Interrupt Routing Table 62 Figure 5...

Page 6: ...e 5 19 TTL LCD Connections 82 Table 5 14 LVDS TTL LCD Pin out 83 5 6 3 Layout Requirement 83 Figure 5 20 LVDS LCD Layout Guideline 83 Figure 5 21 TTL LCD Layout Guideline 84 5 7 IDE0 IDE1 84 5 7 1 Sig...

Page 7: ...3 Figure 5 38 One Composite and One SCART Outputs 104 5 12 3 Layout Guideline 104 Figure 5 39 TV DAC Signal Routing Spacing 105 5 13 IrDA 106 5 13 1 Signal Description 106 Table 5 24 IrDA signals desc...

Page 8: ...hermal Interface Material 123 8 3 Attachment Method of Thermal Solution 123 8 4 Grounding Issues 123 8 5 Air intake clearance and Airflow of Heatsink 123 Figure 8 1 Air Intake Clearance 124 Figure 8 2...

Page 9: ...X Embedded Technology Extended FSB Front Side Bus synonymous with Host or CPU bus GMCH Refers to the Graphics Memory Controller Hub chipset component I2C Inter IC a two wire serial bus created by Phil...

Page 10: ...Advanced Power Management APM Specification 1 2 http www microsoft com hwdev busbios amp_12 htm Ethernet IEEE 802 3 http www ieee org portal site I2C Bus Interface http www semiconductors philips com...

Page 11: ...exibility to the system The SOM ETX form factor allows the CPU modules to be easily and securely mounted on a customized solution board The design and multiple processor choices eliminate CPU integrat...

Page 12: ...grators are finding an Advantech SOM ETX solution already covers 80 of their feature requirements This makes SOM ETX a powerful time and money saver Figure 2 3 SOM ETX Customer Solution Board Your Cus...

Page 13: ...0A1 SOM ETX w Intel PIII 933 MHz VGA LVDS LAN AUDIO SOM 4472 Series Description SOM 4472F J0A2 SOM ETX w VIA Eden 400 MHz VGA LCD LAN AUDIO TV SOM 4472FL J0A2 SOM ETX w VIA Eden 400 MHz VGA LVDS LAN A...

Page 14: ...nce 3D AGP 4x Graphics engine giving any platform superior multimedia capability also the ECC Double Data Rate DDR USB2 0 supporting providing the stable and reliable on whole system architecture ISA...

Page 15: ...els timer interval from 1 to 255 sec or min setup by software jumperless selection generates system reset Expansion Interface Support PCI ISA interface MIO 2 x EIDE UDMA 66 1x LPT FDD shared 1 x K B 1...

Page 16: ...raphics engine giving any platform superior multimedia capability USB2 0 supporting providing the stable and reliable on whole system architecture W83627HF Mic DDR SDRAM Up to 1GB FWH 732 uFCBGA Analo...

Page 17: ...ware jumperless selection generates system reset Expansion Interface Support PCI ISA interface MIO 2 x EIDE UDMA 66 1x LPT FDD shared 1 x K B 1 x Mouse 2 x RS232 IrDA 115 Kbps IrDA 1 1 compliant USB 4...

Page 18: ...2C686A core chipset is a high performance 3D 4x AGP Graphics engine giving any platform superior multimedia capability FWH Ethernet RTL8139C 10 100 LAN USB 1 1 x 4 SDRAM Mic Up to 512MB AC Link VIA Su...

Page 19: ...x FDD LPT 1 x K B 1 x Mouse 2 x RS 232 IrDA 115 Kbps IrDA 1 1 compliant USB 4 USB ports USB 1 1 compliant Ethernet RTL 8139 IEEE 802 3u 100BASE T Fast Ethernet Built in boot ROM Chipset VIA Twister c...

Page 20: ...cludes a 4X AGP controller a PCI audio interface a PCI Ethernet interface and 2 channel LVDS interface Other on board features include an LPT 4 USBs IrDA and 2 serial ports 2 RS 232s FWH Ethernet RTL8...

Page 21: ...use 2 x RS 232 IrDA 115 Kbps IrDA 1 1 compliant USB 4 USB ports USB 1 1 compliant Ethernet RTL 8139 IEEE 802 3u 100BASE T Fast Ethernet Built in boot ROM Chipset VIA Twister chip with Integrated S3 Sa...

Page 22: ...odule gives developers a platform that accelerates their development time while maintaining the capability performance and durability of the application TV Out WatchDog XC9536 CPLD Mic Line In Line Ou...

Page 23: ...out Speaker out MIO 2 x EIDE Ultra DMA33 1 x FDD LPT 1 x K B 1 x Mouse 2 x RS 232 IrDA 115 Kbps IrDA 1 1 compliant USB 2 USB ports USB 1 1 compliant Ethernet Intel 82559ER IEEE 802 3u 100BASE T Fast E...

Page 24: ...port for DOC 62 level watchdog timer and jumperless on line setup is also supported W83626F ISA Bus W83627F HF LPC S IO LPC Bus LPT Floopy Analog RGB Mic Line Out Line In ALC201 AC Link AC 97 Codec CO...

Page 25: ...LPT 1 x K B 1 x Mouse 2 x RS 232 IrDA 115 Kbps IrDA 1 0 compliant USB 2 USB ports USB 1 1 compliant Ethernet RTL 8139C IEEE 802 3u 100BASE T Fast Ethernet Built in boot ROM Chipset SiS 552 Resolution...

Page 26: ...hnology has to offer Combined with the CS5530A system chipset and RTL 8139 Ethernet chipset optional for Intel solution the SOM 4450 is a low power high performance platform ready to be integrated wit...

Page 27: ...3 1 x FDD LPT 1 x K B 1 x Mouse 2 x RS 232 IrDA 115 Kbps IrDA 1 0 compliant USB 2 USB ports USB 1 1 compliant Ethernet RTL 8139C optional Intel 82559ER interface IEEE 802 3u 100BASE T Fast Ethernet Bu...

Page 28: ...igure 2 11 SOM DB4400 Block Diagram SOM DB4400 Main Features Offers standard PC environment PCI ISA expansion interface Reference design and prototype platform ATX form factor Table 2 9 SOM DB4400 Ite...

Page 29: ...oft ACPI Compliant System Intel R 82801DB DBM SMBus Controller 24C3 10 11 12 ISA PS 2 Compatible Mouse 13 ISA Numeric data processor 14 ISA Primary IDE Channel 15 ISA Secondary IDE Channel 16 PCI Inte...

Page 30: ...bus D8000000 DFFFFFFF Intel R 82852 82855 GM GME Graphics Controller E0000000 E7FFFFFF Intel R 82852 82855 GM GME Graphics Controller E8000000 E807FFFF Intel R 82852 82855 GM GME Graphics Controller...

Page 31: ...resources 000000F0 000000FF Numeric data processor 00000170 00000177 Secondary IDE Channel 000001F0 000001F7 Primary IDE Channel 00000274 00000277 ISAPNP Read Data Port 00000279 00000279 ISAPNP Read...

Page 32: ...to DMA4 1 2 Standard floppy disk controller 3 ECP Printer Port LPT1 4 Direct memory access controller 5 6 7 Table 2 17 SOM 4475 Memory Map Memory Address Description 00000000 0009FFFF System board 00...

Page 33: ...0001F7 Primary IDE Channel 00000274 00000277 ISAPNP Read Data Port 00000279 00000279 ISAPNP Read Data Port 000002F8 000002FF 00000376 00000376 Secondary IDE Channel 00000378 0000037F Printer Port LPT1...

Page 34: ...o DMA4 1 2 Standard floppy disk controller 3 ECP Printer Port LPT1 4 Direct memory access controller 5 6 7 Table 2 22 SOM 4472 Memory Map Memory Address Description 00000000 0009FFFF System board 000A...

Page 35: ...IDE Channel 00000274 00000277 ISAPNP Read Data Port 00000279 00000279 ISAPNP Read Data Port 000002F8 000002FF Communications Port COM2 00000376 00000376 Secondary IDE Channel 00000378 0000037F Printer...

Page 36: ...r Port LPT1 4 Direct memory access controller 5 6 7 Table 2 27 SOM 4470 Memory Map Memory Address Description 00000000 0009FFFF System board 000A0000 000BFFFF PCI bus 000A0000 000BFFFF Intel 82443BX P...

Page 37: ...0 000001F7 Primary IDE Channel 00000274 00000277 ISAPNP Read Data Port 00000279 00000279 ISAPNP Read Data Port 000002F8 000002FF Communications Port COM2 00000376 00000376 Secondary IDE Channel 000003...

Page 38: ...CP Printer Port LPT1 4 Direct memory access controller 5 6 7 Table 2 32 SOM 4451 Memory Map Memory Address Description 00000000 0009FFFF System board 000A0000 000C7FFF PCI bus 000A0000 000BFFFF PCI st...

Page 39: ...7 Primary IDE Channel 00000274 00000277 ISAPNP Read Data Port 00000279 00000279 ISAPNP Read Data Port 000002F8 000002FF Communications Port COM2 00000378 0000037F Printer Port LPT1 000003B0 000003BB P...

Page 40: ...r 5 Audio device 6 7 Table 2 37 SOM 4450 Memory Map Memory Address Description 00000000 0009FFFF System board 000A0000 000BFFFF VgaSave 000A0000 000BFFFF PCI bus 000CC000 000DFFFF PCI bus 000E0000 000...

Page 41: ...CF7 PCI bus 00000170 00000177 Secondary IDE Channel 000001CE 000001CF VgaSave 000001F0 000001F7 Primary IDE Channel 00000220 0000022F Audio device 00000274 00000277 ISAPNP Read Data Port 00000279 0000...

Page 42: ...IRQ REQ GNT ISDEL 8139C INTA REQ2 GNT2 AD15 SOM 4450 PCI Device IRQ REQ GNT ISDEL 8139C 82551E R INTD REQ1 GNT1 AD14 2 5 DC Specifications The Advantech s SOM ETX modules power consumption properties...

Page 43: ...C3 LP 1GHz Chipset VIA VT8606 VT82C686B RAM SDRAM PC133 128MB RGB 32 Bit Resolution 1024 768 OS WIN2000 SP4 English Version Baseboard SOM DB4400 HCT 4 0 2 12 2 57 3 31 MPEG 2 04 2 46 2 57 Idle 1 59 1...

Page 44: ...ndby 1 26 Note WIN NT does not support MPEG playback and standby function Table 2 46 Power Consumption SOM 4450 SOM 4450 GX1 166MHz 4450 GX1 233MHz 4450 GX1 300MHz Chipset Cyrix CX5530 A RAM SDRAM PC1...

Page 45: ...00MHz 4470 C400MHz 4470 PIII 500MHz 4470 PIII 700MHz 4472 Edan 400MHz 4472 Edan 667MHz 4472 C3 LP 1Ghz 4475 C400MHz 4475 PIII 933MHz 4481 Celeron M 600MHz 4481 Pentium M 1 1GHz Board Model The power c...

Page 46: ...igh Voltage 0 5Vcc Vcc 0 5 V Vil Input Low Voltage 0 5 0 3Vcc V Vipu Input Pull up Voltage 0 7Vcc V 1 Voh Output High Voltage 0 9Vcc V Vol Output Low Voltage 0 1Vcc V 1 This specification should be gu...

Page 47: ...5 V VIH Input High Voltage 2 4 5 5 V VOL Output Low Voltage 0 8 V VOH Output High Voltage 2 0 V Table 2 53 RGB Voltage Symbol Parameter Min Max Unit Note R Red analog video output signal Max luminanc...

Page 48: ...cc V 1 VIH Input High Voltage 0 5Vcc Vcc 0 5 V VOL Ouput Low Voltage 0 1Vcc VOH Output High Voltage 0 9Vcc Vcc 1 Vcc 3 0V min to 3 6V max 2 5 2 8 TV Out Bus Table 2 58 TV Out I O Voltage Symbol Parame...

Page 49: ...4 V 1 The I2C Bus Specification V2 1 2 Vdd is the voltage which the pull up resistor are connected 2 5 2 11 SMBus Table 2 61 SMBus I O Voltage Symbol Parameter Min Max Unit Note VIL Input Low Voltage...

Page 50: ...th 133 100 66 MHz Front Side Bus for VIA C3 and Intel Celeron Pentium III and III M Tualatin CPUs with Integrated ProSavage4 AGP 4x Graphics plus Advanced Memory Controller supporting PC133 PC100 SDRA...

Page 51: ...r 400 pins SOM ETX X1 X2 X3 and X4 X1 connector contains PCI Bus USB Audio interfaces X2 connector contains ISA Bus X3 connector contains VGA LCD LVDS COM1 2 LPT Floppy IrDA KB MS and TV Out interface...

Page 52: ...wer VCC3 3 3V 5 Volts VSB3 3 3V 5 Standby Power VCC3 5 3 3V and 5V tolerance GND System Ground PWR Power Supply Others I F Interface MISC Miscellaneous Interface NC Not Connected Reserved P Power Plan...

Page 53: ...14 PCI IO VCC3 A46 SNDL Audio O VCC3 A47 AD15 PCI IO VCC3 A48 ASGND PWR PWR VCC3 A49 CBE1 PCI IO VCC3 A50 SNDR Audio O VCC3 A51 VCC PWR PWR A52 VCC PWR PWR A53 PAR PCI IO VCC3 A54 SERR PCI IO OD VCC3...

Page 54: ...B44 TC ISA O VCC3 5 B45 SA3 ISA IO VCC3 5 B46 DACK2 ISA O VCC3 5 B47 SA4 ISA IO VCC3 5 B48 IRQ3 ISA I VCC3 5 B49 SA5 ISA IO VCC3 5 B50 IRQ4 ISA I VCC3 5 B51 VCC PWR PWR B52 VCC PWR PWR B53 SA6 ISA IO...

Page 55: ...6_TX 14 LCD O VCC1 5 C43 JILIK_LCDB7_TX 04 LCD O VCC1 5 C44 BACKON _LCDG7_TX 14 LCD O VCC1 5 C45 BIASON_LCDR6 LCD O VCC1 5 C46 LCDON LCD O VCC1 5 C47 COMP TV O VCC3 C48 Y TV O VCC3 C49 TVSYNC TV O VCC...

Page 56: ...SIDE_IOR IDE2 O VCC3 D48 PIDE_RDY IDE1 I D49 VCC PWR PWR D50 VCC PWR PWR D51 SIDE_IOW IDE2 O VCC3 D52 PIDE_IOR IDE1 O VCC3 D53 SIDE_DRQ IDE1 IDE2 I VCC3 D54 PIDE_IOW O VCC3 D55 SIDE_D15 IDE2 IO VCC3 D...

Page 57: ...in neighboring traces Note the trace impedance target assumes that the trace is not subjected to the EMI fields created by changing current in neighboring traces It is important to consider the minim...

Page 58: ...r Core L3 Power Layer Prepreg L4 Signal Layer Total Thickness 62 mils 62 mils Figure 4 1 Four Layer Stack up with 2 Signal Layers and 2 Power Planes Layer Layer Signal End Signals Differential Signals...

Page 59: ...s 62 mils Core L3 IN1 Prepreg L4 IN2 L5 Power Layer Core Table 4 2 Recommended Board Stack Up Dimensions Layer Layer Single End Signals Differential Signals USB differential Signals Dielectric Thickne...

Page 60: ...d ground planes through the length of their routing and should not cross plane splits To guarantee this both planes surrounding strip lines should be GND 3 Recommends that high speed signal routing be...

Page 61: ...ommand and Byte Enables Bus command and byte enables are multiplexed in these lines for address and data phases respectively A53 PAR I O Parity bit for the PCI bus A54 SERR OD System Error Asserted fo...

Page 62: ...NT Connected to a different SOM ETX grant signal for each slot if used Each signal connects differently for each of the four possible slots or devices as summarized in the following PCI Slots Devices...

Page 63: ...2 X X System Interrupt for the details 5 1 2 2 PCI Clock and Clock Skew The trace length for all PCI clocks should be matched and controlled PCI clock routes should be separated as far from other sig...

Page 64: ...and 12V Systems that provide PCI connectors are required to provide all four rails in every system with the current budget Systems may optionally supply 3 3Vaux power Systems that do not support PCI...

Page 65: ...jumper setting is correct when plug in the riser card 2 Advantech demo carried board provides the 5V connector and 5V Vio for PCI slots Plug in a 3 3V riser card in wrong direction will cause the carr...

Page 66: ...900 10 1 0 1 0 55 Ohm 10 6 mils width 6 mils spacing based on stackup assumptions 4 Slots W1 W2 0 5 inches R_IDSEL 300 to 900 10 1 1 1 1 1 1 5 1 3 2 PCI Clock Layout Example Clock Gen SOM ETX SOM ETX...

Page 67: ...ecommended when extra REQ GNT pairs are required Figure 5 5 show the example design for PCI arbiter 33 FRAME 1 STOP 2 SYSREQ 3 SYSGNT 4 PCIREQ1 5 VSS 6 PCIGNT1 7 PCIREQ2 8 VCC 9 PCIGNT2 10 PCIREQ3 11...

Page 68: ...g great expandability and a wide variety of solutions 5 2 1 Signal Description Table 5 8 shows SOM ETX USB signals including pin number signals I 0 power plane terminal resistors damping resistors and...

Page 69: ...hokes and ESD protection devices Some USB designs will need additional ESD or EMI suppression components on the USB data lines These are most effective when they are placed near the external USB conne...

Page 70: ...s impedance after the PCB stack up configuration is known As per usual differential pair routing practices the two traces of each USB pair should be matched in length and kept at uniform spacing Sharp...

Page 71: ...ast enough over current caused by an external USB device may impact the baseboards internal power supply In this case we recommend using active protection circuits available from various vendors These...

Page 72: ...escriptions Table 5 9 Audio signals description Pin Signal I O Description A38 AUXAL I Auxiliary A input left Normally intended for connection to an internal or external CDROM analog output or a simil...

Page 73: ...ing an external amplifier on the audio line out signals On the other hand headphone or speakers that connected to line outputs are also capable to drive an external audio power amplifier Table 5 10 Au...

Page 74: ...e X1 connector has an audio ground pin ASGND pin 48 that should be connected to an analog ground plane underneath the audio amplifier circuits or the audio input output jacks This plane should be isol...

Page 75: ...devices Address bits 0 through 19 are used to address memory within the system These 20 address lines in addition to LA 17 23 allow access of up to 16MB of memory SA 0 19 are gated on the ISA bus whe...

Page 76: ...M16 is high 16 bit CPU cycles are automatically converted on the bus into two 8 bit cycles If M16 is low an access to peripherals is done 16 bits wide B62 REFSH I O REFSH is pulled low whenever a refr...

Page 77: ...t An interrupt request is generated when an IRQ line is raised from low to high The line must be held high until the CPU acknowledges the interrupt request interrupt service routine 5 4 2 Design Guide...

Page 78: ...ms to manage They also have fewer resource limitations Designers should consider PCI and USB as alternatives to new ISA bus implementations or as an eventual upgrade path from ISA designs 5 4 3 Layout...

Page 79: ...O Green analog video output signals for CRT monitors It should be terminated with 75 ohms to ground at the video connector C4 B O Blue analog video output signals for CRT monitors It should be termina...

Page 80: ...p 27p 27p 75ohm HSV VSV A A 68p 68p 33ohm 33ohm D Sub15 Route to Minimum Figure 5 16 VGA Layout Guidelines 5 5 3 2 RGB Output Current Balance Path Analog R G and B red green and blue traces should be...

Page 81: ...TX 03 LCDG1 TX 03 LCDG0 I First LVDS differential Data3 TTL Green Data 1 TTL Green Data 0 C41 C43 TX 04 LCDB6 TX 04 LCDB7 I First LVDS differential Data4 TTL Blue Data 6 First LVDS differential Data4...

Page 82: ...V 5V Bead 30Ohm 100Mhz Figure 5 18 LVDS LCD Connections TTL LCD Connector 120 Ohm 100MHz SOM ETX 10 33 Ohm VGA Damping TTL 10pF Buffer IC for Level Shift Carryboard BACKON Inverter Connector LCDON VDD...

Page 83: ...BA BA BA BA BACK BACK C11 LCD TXC B0 B0 B0 B0 TXC B0 TXC B0 TXC C13 LCD TXC B1 B1 B1 B1 B1 TXC TXC B1 TXC C12 LCD TX B2 B2 B2 B2 B2 B2 TX C14 LCD TX B3 B3 B3 B3 B3 B3 TX C32 LCD TXC B4 TXC B4 TXC B4...

Page 84: ...IDE DEVICE TO WATCH THE READ WRITE COMMAND D56 D53 PIDE_DRQ SIDE_DRQ I IDE DMA Request for IDE Master This is the input pin from the IDE DMA request to do the IDE Master Transfer It will active high...

Page 85: ...NTRQ I Interrupt signal D98 HDRST O Low active hardware reset RSTISA inverted D28 DASP S 0 O Time multiplexed open collector output which indicates that a drive is active or that a slave drive is pres...

Page 86: ...ASP pins of both devices must be connected together Also the PDIAG pins of both devices must be connected together These pairs of pins negotiate between the master and slave devices The devices may no...

Page 87: ...exceed 13 inch SOM ETX IDE bus IDE cable Total Max Length 13 inch Carried Board Figure 5 23 IDE Bus Trace on Carrier Board and Cable Length Limitation 5 7 2 3 IDE interface connections All necessary...

Page 88: ...data and strobes routing guideline This section contains guidelines for connecting and routing the IDE interface The SOM ETX provides two independent IDE channels This section provides guidelines for...

Page 89: ...Link Integrity LED pin indicates link integrity If the link is valid in either 10 or 100 Mbps the LED is on if link is invalid the LED is off D12 ACTLED O The Activity LED pin indicates either transmi...

Page 90: ...These pins sink current and are intended for attachment to a LED cathode The anode of the LED should be pulled to 3 3 volts through a resistor of 330 Ohms or greater 5 8 3 Layout Guideline The transfo...

Page 91: ...have a total trace length of less than one inch Other recommendations Transmit signal traces between the SOM ETX and transformer must be routed as differential pairs with 100 characteristic impedance...

Page 92: ...em or data set that controller is ready to communicate C97 RI 1 I C79 RI 2 I C95 TXD1 O C77 TXD2 O Serial Output Used to transmit serial data out to the communication link C83 RXD1 I RXD2 I Serial Inp...

Page 93: ...igurations Ex use TXD and RXD only SOM ETX generally supports either one parallel port or one Floppy drive While the parallel port is used in parallel port mode floppy disk support is not available vi...

Page 94: ...y OD The active low raw data read signal from the disk is connected here Each falling edge represents a flux transition of the encoded data OD PD4 C72 PD4_DSKCHG Floppy OD This disk interface input in...

Page 95: ...all SOM modules please refer to Table 5 21 for detail If the pull up resistors are not been added in it should be designed on baseboard for the signals that needed In additional it also can use a PAC...

Page 96: ...ta 2 Data 3 Data 4 Data 5 Data 6 Data 7 AutoFeed Error Initial Figure 5 30 LPT Connections Figure 5 31 Floppy Connections SOM ETX Floppy AFD _DENSEL C56 PD6_MOT0 C62 PD4_DSKCHG C72 PD3_RDATA C74 PD2_W...

Page 97: ...mode floppy disk support is not available via the parallel port If floppy disk support is needed an external controller may be incorporated in the baseboard design 5 10 2 4 Options for Simultaneous F...

Page 98: ...at I O signal and electrical connection points The goal is to prevent component or system failures due to externally sourced ESD impulses that may be propagated through both radiated and conducted mec...

Page 99: ...EL C60 PD7_DSA C58 D Sub 25 Route to Minimum Strobe Data 0 Acknowledge Select Input Select Out of Paper Busy Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 AutoFeed Error Initial Must be implemented...

Page 100: ...Bi direction mouse data signal SOM ETX Parallel Port STB C55 AFD _DENSEL C56 PD6_MOT0 C62 PD5 C68 PD4_DSKCHG C72 PD3_RDATA C74 PD2_WP C76 PD1_TRK0 C78 PD0_INDEX C80 SLCT_WGATE C90 PE_WDATA C88 BUSY _...

Page 101: ...and Mouse connection 5 11 3 Layout Requirement 5 11 3 1 KB MS Power Trace According to general keyboard and mouse power specification the traces of keyboard and mouse power trace should be route to af...

Page 102: ...ction Please refer to section 5 10 3 2 TV out display TV DAC interface consists of 4 output TVSYNC Y C COMP which can be used in different combinations to support S video or composite video 5 12 1 Sig...

Page 103: ...output filter network are implemented at SOM ETX module To minimize the hazard of ESD from discharge of TV a set of protection diodes like BAT54S is strongly recommended to use for each DAC output Th...

Page 104: ...TV DAC signals is 40mils but 50 mils is preferred A maximal amount of spacing should be used between each TV DAC signals as well as to all other toggling signals This is to prevent crosstalk between t...

Page 105: ...Advantech SOM ETX Design Guide Figure 5 39 TV DAC Signal Routing Spacing Chapter 5 Carrier Board Design Guidelines 105...

Page 106: ...e 5 24 IrDA signals description Pin Signal I O Description C59 Infrared receive C61 IRTX O Infrared transmit 5 13 2 Design Guideline We can series to some ferrite bead to avoid EMI Following examples...

Page 107: ...O ground if the IR connector was on the I O plane Figure 5 41 5 13 3 Layout Guideline IR layout requirement is not restricted strictly Because the IR frequency was not higher than other fast buses So...

Page 108: ...D3 VCCSB5V P Remove All Circuit Power Except Internal Suspend Circuit PS_ON will become active high to disable all the circuits except internal Suspend circuit Connect to PS On of your ATX power supp...

Page 109: ...an external FET or logic gate that drives an external PC speaker The SOM ETX modules SPKR output should not be directly connected to either a pull up or a pull down resistor The SPKR signal is often u...

Page 110: ...uire an RTC battery with greater capacity than small coin cells can provide The required battery capacity varies among SOM ETX modules and operating conditions In particular sustained high operating t...

Page 111: ...ure 5 46 Power Good Reset Input Connections The SOM ETX Power Good Input PWGIN may be attached to an external power good circuit if desired or used as a manual reset input by grounding the pin with a...

Page 112: ...onstantly present source of 5V power to support this functionality Typical current consumption from the VCCSB5V supply pin is under 10mA The PS ON signal is an active low output that turns on the main...

Page 113: ...ails for this feature can be different between SOM ETX modules Refer to the individual SOM ETX user s guide for details 5 14 9 Wake on Ring RINGWAKE is an active low output from the serial port to SOM...

Page 114: ...7u MMBD2837LT1 2 1 3 MMBT3904 2 3 1 10K MMBD2837LT1 2 1 3 2 2K RINGWAKE pull up resister is already on SOM ETX modules RINGWAKE NRI 4 NRI 3 NRI 2 NRI 1 Figure 5 50 Wake on Ring Connections multiple C...

Page 115: ...Celeron 400MHz 1 24 2 2 PIII 500MHz 1 28 2 25 4470 PIII 700MHz 1 06 2 33 HCT in Win2000 C3 300MHz 1 14 1 29 C3 400MHz 1 02 1 26 C3 667MHz 1 35 1 96 C3 733MHz 1 45 2 21 C3 800MHz 1 58 2 84 4472 C3 LP 1...

Page 116: ...3 3V 5VSBY power if other voltage is required 3 3VSBY LAN2 5 on carried board The additional switching regulator or LDO will be necessary ATX Power Source 12V 12V 5VSBY 5V 3 3V 5V SOM ETX LDO 3 3VSBY...

Page 117: ...rce be used AT Power Source 12V 3 3V 5V SOM ETX 12V Switching regulator or LDO POWER OUT Figure 6 2 AT Power Delivery Block Diagram 6 2 3 Non used 3 3V Pins on SOM Connector SOM ETX provides the 3 3V...

Page 118: ...ns The connector height on SOM ETX was 3mm when we design the carrier board we must notice the area behind the SOM ETX modules No component on this area is needed The other special solution is 4mm so...

Page 119: ...ETX design 3mm For the special case we can use 4mm height connector on SOM ETX modules 1mm Figure 7 2 Connector Hirose FX8 100 Footprint Figure 7 2 shows the SOM ETX carrier board connector mechanical...

Page 120: ...o temperature 40 2 and humidity 90 95 for 96 hours 6 Temperature Cycle Contact resistance 55m ohm max Insulation resistance 100Mohm min 55 30 minutes 15 35 2 3 minutes 5 cycles 85 30 minutes 15 35 2 3...

Page 121: ...so never fix the connector between boards by mating force only 3 Stacking Height Tolerance for Mating Note Please Note that the above stacking tolerance doesn t include the solder paste thickness 4 M...

Page 122: ...dvantages include high weight high price and less choice as far as production methods are concerned Copper heatsinks can be milled die cast or made of copper plates bonded together extrusion is not po...

Page 123: ...rmal solutions have been designed with mounting holes in the heatsink base A plastic rivet is currently in development that can be used to fasten smaller heatsinks For larger and heavier heatsinks a f...

Page 124: ...igure 8 3 SOM ETX Heatsink The SOM ETX without heatsink has a maximum thickness of 12 mm while the top components are up to 8mm high and the bottom components are up to 2 mm high The headers X1 to X4...

Page 125: ...Advantech SOM ETX Design Guide 8 7 Advantech Heatsink Information 8 7 1 Heatsink Figure 8 4 Heatsink appearance Chapter 8 Heat Sink Recommended Design 125...

Page 126: ...n Guide Figure 8 5 Heatsink Dimensions Table 8 1 Chemical Makeup Temper Designation Value Si Fe Cu Mn Cr Mg Zn Ti SPECIFIED 0 4258 0 2037 0 0032 0 0059 0 0028 0 5147 0 0000 0 00263 126 Chapter 8 Heat...

Page 127: ...esign Guide Figure 8 6 Dimensions Table 8 2 Chemical Makeup Temper Designation Value Si Fe Cu Mn Cr Mg Zn Ti SPECIFIED 0 4258 0 2037 0 0032 0 0059 0 0028 0 5147 0 0000 0 00263 Chapter 8 Heat Sink Reco...

Page 128: ...e 8 3 Mechanical Characteristics Alloy No Tensile Strength 26 32 kgf mm2 Hardness Test 80 100HV Elongation C 1100 26 1 82 98 Table 8 4 Chemical Makeup Temper Designation Value Cu Pb Fe Sn Zn P SPECIFI...

Page 129: ...Guide Figure 8 8 Dimensions Table 8 5 Thermal pad Item Specification Brand Size mm CPU GR m 100G m FUJIPOLY SAR CON 35 35 1 0 North Bridge S3 GR m 100G m FUJIPOLY SAR CON 35 35 1 0 Chapter 8 Heat Sin...

Page 130: ...Advantech SOM ETX Design Guide 130 Chapter 8 Heat Sink Recommended Design...

Page 131: ...F No 786 Chung Cheng Rd Chung Ho City Taipei Hsien Taiwan R O C Contact Steven Wang Telephone 886 2 3234 0050 ext 333 Steven coolermater Thermal Interface Material Shin Etsu Micro Si Inc 10028 S 51stS...

Page 132: ...10 mm Rated Speed 5500 10 RPM Air Flow 0 15 m3 min MAX Noise Level 25 dB A MAX Rated Voltage 12 VDC Operating Voltage Range 10 2 13 8 VDC Housing Fan Blade Thermoplastic PBT of UL 94V 0 Static Pressu...

Page 133: ...5 19 5mm Table 8 10 Thermal Specifications Crusoe Processor Model Thermal Design Power Maximum Case Temperature Value maximum max min TDPmax W max Pentium M 1 1GHz 12 95 855GME 4 3 105 Table 8 11 The...

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