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Advantech SOM-ETX Design Guide
Signal Description.........................................................................94
Table 5.20 LTP/Floppy Signal Descriptions.................................94
Design Note..................................................................................95
Table 5.21 Pull-high resistor in different SOM modules ..............95
Figure 5-30 LPT Connections......................................................96
Figure 5-31 Floppy Connections..................................................96
Layout Requirement .....................................................................98
Figure 5-32 Practical LPT Port Design ........................................99
Figure 5-33 Practical Floppy Design............................................99
Figure 5-34 Practical LPT Port Design Using PAC1284............100
PS/2 Keyboard and Mouse..................................................................100
Signal Description.......................................................................100
Table 5.22 KB/MS signal descriptions .......................................100
Design Note................................................................................101
Figure 5-35 Keyboard and Mouse connection...........................101
Layout Requirement ...................................................................101
Figure 5-36 Practical KB/MS circuit ...........................................102
EMI Consideration ......................................................................102
Signal Description.......................................................................102
Table 5.23 TV signals description...............................................102
Design Guideline ........................................................................103
Figure 5-37 Two Composite and One S-Video Outputs\ ...........103
Figure 5-38 One Composite and One SCART Outputs.............104
Layout Guideline.........................................................................104
Figure 5-39 TV DAC Signal Routing Spacing............................105
Signal Description.......................................................................106
Table 5.24 IrDA signals description ............................................106
Design Guideline ........................................................................106
Figure 5-40 .................................................................................106
Figure 5-41 .................................................................................107
Layout Guideline.........................................................................107
Miscellaneous Signal Description ...............................................108
Table 5.25 Misc signal descriptions............................................108
Speaker ......................................................................................109
Figure 5-42 Speaker Connections .............................................109
Battery ........................................................................................110
Figure 5-43 Battery Connections ...............................................110
I2C Bus .......................................................................................110
Figure 5-44 I2C Bus Connections..............................................110
SMBus ........................................................................................111
Figure 5-45 I2C Bus Connections..............................................111
Power Good / Reset Input ..........................................................111
Figure 5-46 Power Good / Reset Input Connections .................111
ATX Power Supply Control .........................................................112
Figure 5-47 ATX Power Supply Connections ............................112
External SMI Interrupt.................................................................113
Figure 5-48 External SMI Interrupt Connections .......................113
Wake on Ring .............................................................................113
Figure 5-49 Wake on Ring Connections(two Comport) .............113
Figure 5-50 Wake on Ring Connections(multiple Comport) ......114
Power Delivery Guidelines ...............................................................115
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