Award BIOS Setup
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3.6 Advanced Chipset Features
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
access to system memory resources, such as DRAM and the external
cache. It also coordinates communications between the conventional ISA
bus and the PCI bus. It must be stated that these items should never need
to be altered. The default settings have been chosen because they provide
the best operating conditions for your system. The only time you might
consider making any changes would be if you discovered that data was
being lost while using your system.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
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DRAM Clock/Drive Control
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AGP & P2P Bridge Control
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CPU & PCI Bus Control
System BIOS Cacheable
Video RAM Cacheable
Disk On Chip Address
Power-Supply Type
VGA Share Memory Size
Select Display Device
Panel Type
Panel Outport Port
Panel Clock Mode
Panel Bus width
Memory Parity/ECC Check
Press Enter
Press Enter
Press Enter
Disabled
Disabled
DC000H-DFFFFH
ATX
32M
CRT
00
Di0
Single
24 Bits
Disabled
Item Help
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Menu Level
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↑↓→←
Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-safe defaults F7: Optimized Defaults
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