ADLINK Technology NuDAQ PCI-9812/10, User Manual

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Table of Contents
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i
CONTENTS
How to Use This Guide .......................................... iv
Chapter 1 Introduction...........................................1
1.1 Features.......................................................................... 1
1.2 Applications.................................................................... 2
1.3 Specifications ................................................................. 2
1.4 Software Support............................................................ 4
1.4.1 Programming Library..................................................................4
1.4.2 PCIS-LVIEW: LabVIEW
®
Driver.................................................4
1.4.3 PCIS-VEE: HP-VEE Driver..........................................................4
1.4.4 DAQBench
TM
: ActiveX Controls ...............................................5
1.4.5 DASYLab
TM
PRO...........................................................................5
Chapter 2 Installation ............................................6
2.1 What You Have ............................................................... 7
2.2 Unpacking....................................................................... 7
2.3 PCI-9812/10's Layout ...................................................... 8
2.4 Hardware Installation...................................................... 9
2.5 Device Installation for Windows Systems....................... 9
Chapter 3 Signal Connection ..............................10
3.1 Connectors ................................................................... 10
3.2 Analog Input Impedance Setting................................... 12
3.2.1 Analog Input ............................................................................... 12
3.2.2 External Clock 0......................................................................... 13
3.2.3 External Clock 1......................................................................... 13
3.2.4 Digital Input................................................................................. 13
Chapter 4 Registers Format................................14
4.1 I/O Port Address ........................................................... 14
4.2 ADC Channel Enable Register ...................................... 15
4.3 ADC Clock Divisor Register.......................................... 16
4.4 Trigger Mode Register .................................................. 17
4.5 Trigger Level Register .................................................. 18
4.6 Trigger Source Register................................................ 19
4.7 Post Trigger Counter Register...................................... 20
4.8 FIFO Status Register..................................................... 21