ADLINK Technology NuDAQ PCI-9812/10 User Manual Download

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Operation Theorem

•

A/D Data (Hex) Decimal Value V (Volts, -1V~1V) V (Volts, -5V~5V)

7FC 0

+32704

+1.0000

+5.0000

400 0

+16384

+0.5002

+2.5010

0040

+64

+0.0005

+0.0025

000 0

0.0000

FFC 0

-64

-0.0005

-0.0025

C00 0

-16384

-0.5002

-2.5010

804 0

-32704

-1.0000

-5.0000

800 0

-32768

-1.0020

-5.0098

The formula between the A/D data and the analog value is

Voltage = AD_data x (1/K) x (Gain)

where

Gain

and

are constants.

For analog input range

-1V~1V,

Gain

=1; for analog input range

5V~5V,

Gain

=5.

For PCI-9812, K=2047x16=32752;
for PCI-9810, K=511x64=32704.

Summary of Contents for NuDAQ PCI-9812/10

Page 1: ...NuDAQ PCI 9812 10 20MHz Simultaneous 4 CH Analog Input Card Users Guide ...

Page 2: ...of the use or inability to use the product or documentation even if advised of the possibility of such damages This document contains proprietary information protected by copyright All rights are reserved No part of this manual may be reproduced by any mechanical electronic or other means in any form without prior written permission of the manufacturer Trademarks NuDAQ PCI 9812 DAQBench PCIS DASK ...

Page 3: ...RO nupro adlink com tw Software sw adlink com tw AMB amb adlink com tw TEL 886 2 82265877 FAX 886 2 82265717 Address 9F No 166 Jian Yi Road Chungho City Taipei 235 Taiwan R O C Please inform or FAX us of your detailed information for a prompt satisfactory and constant service Detailed Company Information Company Organization Contact Person E mail Address Address Country TEL FAX Web Site Questions ...

Page 4: ......

Page 5: ...ng 7 2 3 PCI 9812 10 s Layout 8 2 4 Hardware Installation 9 2 5 Device Installation for Windows Systems 9 Chapter 3 Signal Connection 10 3 1 Connectors 10 3 2 Analog Input Impedance Setting 12 3 2 1 Analog Input 12 3 2 2 External Clock 0 13 3 2 3 External Clock 1 13 3 2 4 Digital Input 13 Chapter 4 Registers Format 14 4 1 I O Port Address 14 4 2 ADC Channel Enable Register 15 4 3 ADC Clock Divisor...

Page 6: ...rnal Pacer Clock 31 5 4 4 Multiple Cards Operation 32 5 5 A D Data Transfer 33 5 5 1 AD Data Transfer 33 5 5 2 Simultaneous Sampling of 4 AD Channels 33 5 5 3 Total Data Throughput 34 5 5 4 Maximum Acquiring Data Length 34 5 5 5 Bus mastering Data Transfer 34 5 5 6 Host Memory Operation 35 5 5 7 Summary 36 5 6 AD Data Format 36 Chapter 6 C C Library 38 5 1 Libraries Installation 38 5 2 Programming...

Page 7: ...eed 51 7 2 VR Assignment 52 7 3 A D Calibration 52 7 3 1 AD Calibration for Channel 0 52 7 3 2 AD Calibration for Channel 1 2 3 52 Chapter 8 Software Utility 55 8 1 Running 9812util exe 56 8 2 System Configuration 57 8 3 Calibration 58 8 4 Functional Testing 60 Product Warranty Service 62 ...

Page 8: ...l and devices with the PCI 9812 10 Chapter 4 Registers Structure Format describes the details of register format and structure of the PCI 9812 10 this information is very important for the programmers who want to control the hardware by low level programming Chapter 5 Operation Theorem describes how to operate the PCI 9812 10 The A D functions are introduced Also some programming concepts are spec...

Page 9: ...this card ideal for DSP FFT digital filtering and image processing applications 1 1 Features PCI 9812 PCI Bus Advanced Data Acquisition Card is designed with the following advanced features 32 bit PCI Bus Bus Mastering DMA data transfer 12 bit 9812 or 10 bit 9810 analog input resolution On board 32K words samples A D FIFO memory Up to 20MHz A D sampling rate 4 single ended analog input channels Bi...

Page 10: ...channels enabled the 20 MHz sampling rate can be reached only when the number of samples accessed for each channel is smaller than 16K For four channels enabled the 20 MHz sampling rate can be reached only when the number of samples accessed for each channel is smaller than 8K Please refer to section 5 5 for more detail information about the sampling rate and data length limitation Accuracy Gain E...

Page 11: ...re trigger Post trigger Middle trigger and Delay trigger AD Data Transfer Method DMA Bus mastering Digital Input Numbers of channel 3 TTL compatible inputs with 10K ohms pull down resistor Input Voltage Low Min 0V Max 0 8V High Min 2 0V Max 5 5V Input Load Low 1µA 0V 0 5ma 5V High 2 7V min 20mA max General Specifications Connectors 5 BNC type one 10 pin header Operating Temperature 0 C 40 C Storag...

Page 12: ...functions descriptions are included in this user s guide u PCIS DASK Include device drivers and DLL for Windows 98 Windows NT and Windows 2000 DLL is binary compatible across Windows 98 Windows NT and Windows 2000 That means all applications developed with PCIS DASK are compatible across Windows 98 Windows NT and Windows 2000 The developing environment can be VB VC Delphi BC5 or any Windows progra...

Page 13: ...mers who are familiar with ActiveX controls and VB VC programming use the DAQBenchTM ActiveX Control components library for developing applications The DAQBench TM is designed under Windows NT 98 For more detailed information about DAQBench please refer to the user s guide in the CD Manual_PDF Software DAQBench DAQBench Manual PDF 1 4 5 DASYLab TM PRO DASYLab is an easy to use software package whi...

Page 14: ... form factor DAS card For system reliability it is necessary to manually assign some critical settings for analog input and output because these settings will not be changed after your data acquisition system configuration is decided The settings will let your system perform reliably safely user can not change the configuration by software directly when your system is running Please follow the ste...

Page 15: ...ectricity The card should be handled on a grounded anti static mat The operator should be wearing an anti static wristband grounded at the same point as the anti static mat Inspect the card module carton for obvious damage Shipping and handling may cause damage to your module Be sure there is no shipping and handing damage on the module before processing After opening the card module carton extrac...

Page 16: ...I 9810 1 9 JP1 2 10 VR4 VR8 VR3 VR7 VR2 VR6 VR1 VR5 R95 R97 C05V C0LO C25V C2LO R95 C05V C0LO 2 3 PCI 9812 10 s Layout Figure 2 1 PCB Layout of the PCI 9812 10 ALTERA CH0 CH1 CH3 AMCC External Sine Wave Clock CH2 J1 J2 J3 J4 J5 ...

Page 17: ...ility to operate this board well Installation Procedures 1 Turn off your computer 2 Turn off all accessories printer modem monitor etc connected to your computer 3 Remove the cover from your computer 4 Setup jumpers on the PCI or CompactPCI card 5 Select a 32 bit PCI slot PCI slot are short than ISA or EISA slots and are usually white or ivory 6 Before handling the PCI cards discharge any static b...

Page 18: ...rnal devices and the switch setting for different applications 3 1 Connectors The PCI 9812 10 connects to external devices through five BNC connectors and one 10 pin dual in line header Fig 3 1 shows the location of these connectors Figure 3 1 Location of connectors CH0 CH1 CH2 External Sine wave clock CH3 1 9 JP1 PCI 9812 PCI 9810 2 10 J1 J2 J3 J4 J5 ...

Page 19: ...s used for digital input signal including 1 digital clock 1 digital trigger and 3 digital input The pin out of JP1 is listed below Pin 1 External Clock Input 1 Pin 2 Ground Pin 3 External Digital Trigger Input Pin 4 Ground Pin 5 Digital Input 0 Pin 6 Ground Pin 7 Digital Input 1 Pin 8 Ground Pin 9 Digital Input 2 Pin 10 Ground Note If the JP1 is connected to a 9 pin D type connector through a ribb...

Page 20: ...der gap switches named C0LO channel 0 low impedance and C05V channel 0 5V input to setup the input characteristics of channel 0 Please refer to fig 2 1 in section 2 3 C0LO C05V Input Impedance Input Range Open Open High 15M Ohm 1V Open Close 1 25K Ohm 5V Close Open Low 50 Ohm 1V default Close Close Low 50 Ohm 5V CAUTION When the input channel is configured as a high impedance input DO NOT leave th...

Page 21: ...rnal clock 0 is 50 ohms and the input level is 2 volts peak to peak Please note that the External Clock s frequency is the system clock The maximum A D clock frequency is half of the system clock 3 2 3 External Clock 1 The external clock 1 JP1 pin 1 is a digital clock The input impedance is 50 ohms and the input level should be 2 4V 5V into the 50 ohm load This signal is DC coupled 3 2 4 Digital I...

Page 22: ...rst transfer to memory space by using 32 bit data So both data read and write will be based on 32 bit data transfer The Table 4 1 shows the I O address of each register with respect to the base address The function of each register also is shown I O Address Read Write Base 0 ADC Channel Enable Reg Base 4 ADC Clock Divisor Reg Base 8 Trigger Mode Reg Base C Trigger Level Reg Base 10 Trigger Source ...

Page 23: ...le register Address BASE 0 Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 BASE 0 CH3EN CH2EN CH1EN CH0EN BASE 1 BASE 2 BASE 3 bit 31 4 don t care Don t care bit 3 CH3EN bit 2 CH2EN bit 1 CH1EN bit 0 CH0EN All the legal combinations refer to section 5 5 of these four bits are 0000 no channel is enabled 0001 only CH0 is enabled 0011 CH0 and CH1 are enabled 1111 all channels are enabled ...

Page 24: ...g clock The frequency of the ADC sampling clock is Frequency of source clock ADC clock divisor Address BASE 04h Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 Base 4 DIV7 DIV6 DIV5 DIV4 DIV3 DIV2 DIV1 DIV0 Base 5 DIV15 DIV14 DIV13 DIV12 DIV11 DIV10 DIV9 DIV8 Base 6 Base 7 DIV15 0 The AD clock frequency devisor don t care Note the minimum value of this register is 2 and the DIV0 is hardwired ...

Page 25: ...E 08h Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 Base 8 TRGMOD2 TRGMOD1 TRGMOD0 Base 9 Base A Base B TRGMOD2 0 Trigger mode don t care The 5 trigger modes are list as the following table TRGMOD2 TRGMOD1 TRGMOD0 Trigger Mode 0 0 0 software trigger 0 0 1 post trigger 0 1 0 pre trigger 0 1 1 delay trigger 1 0 0 middle trigger Note All the other values of this register are illegal and the PC...

Page 26: ...dress BASE 0ch Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 BASE Ch TRGLVL7 TRGLVL6 TRGLVL5 TRGLVL4 TRGLVL3 TRGLVL2 TRGLVL1 TRGLVL0 BASE Dh BASE Eh BASE Fh TRGLVL7 0 trigger level don t care The relationship between the 8 bit trigger level and the trigger voltage is TRGLVL7 0 bit 7 0 trigger voltage 1V trigger voltage 5V 0xFF 0 992V 4 96V 0xFE 0 984V 4 92V 0x81 0 008V 0 04V 0x80 0 000V 0 0...

Page 27: ...C0 Base 11 Base 12 Base 13 TRGSLP trigger slope 0 positive slope trigger 1 negative slope trigger TRGSRC2 TRGSRC0 trigger source TRIGSRC2 TRIGSRC2 TRIGSRC2 trigger source 0 0 0 CH0 0 0 1 CH1 0 1 0 CH2 0 1 1 CH3 1 X X EX_DIG_trigger When the external digital trigger is selected the positive slope trigger equals to rising edge trigger and the negative slope trigger equals to falling edge trigger and...

Page 28: ...e counter stops The counter is used to control the delay time in delay trigger mode and to control the post trigger sampling count in middle trigger mode Address BASE 14h Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 BASE Ch PSTCN 7 PSTCN 6 PSTCN 5 PSTCN 4 PSTCN 3 PSTCN 2 PSTCN 1 PSTCN0 BASE Dh PSTCN15 PSTCN14 PSTCN13 PSTCN12 PSTCN11 PSTCN10 PSTCN9 PSTCN8 BASE Eh BASE Fh PSTCNT15 0 This val...

Page 29: ...The FIFO is not half full yet 1 The FIFO is at least half full bit 2 FIFOOR FIFO output ready flag 0 The FIFO is not ready for output which means the FIFO is empty 1 The FIFO is ready for output not empty bit 3 PTC0 post trigger counter is 0 0 The post trigger counter is not 0 1 The post trigger counter reaches 0 bit 4 TD trigger detection flag 0 The trigger condition is not met yet no trigger is ...

Page 30: ...FO is cleared bit 1 CLRTRG clear trigger detection flag When a 1 is written to this bit the trigger detection bit is cleared bit 2 31 don t care 4 10 Acquisition Enable Register The register enables or disables the ADC acquisition Address BASE 1ch Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 BASE 18h ACQEN BASE 19h BASE 1Ah BASE 1Bh bit 31 1 don t care bit 0 ACQEN acquisition enable When a...

Page 31: ... selection Freq_Sel 1 frequency of A D clock source is higher than PCI clock frequency 33 MHz 0 frequency of A D clock source is lower than PCI clock frequency 33 MHz CLKSRC2 CLKSRC1 selected clock source 0 0 internal clock 40 MHz 0 1 external sine wave clock 1 0 external digital clock 1 1 illegal Note When external clock is selected this external clock is also divided by the frequency divider as ...

Page 32: ...e CD For more detailed information please refer to Chapter 6 C C Software Library 4 13 Low Level Programming To operate the PCI 9812 10 users do not need to understand how to write a hardware dependent low level program Because it is more complex to control the PCI controller and the information is not described in this manual We do not recommend users to program its applications based on low leve...

Page 33: ... you have to understand the following concepts l A D conversion procedure l A D signal source control l A D trigger source control l A D clock control l A D data transfer mode l A D data format When using an A D converter users should know about the properties of the siginal to be measured at first Users can decide which channels to use and connect the signals to the PCI 9812 10 In addition users ...

Page 34: ...812 10 uses DMA to transfer the A D data to host memory Please refer to section 5 5 To process A D data programmer should know about the A D data format Please refer ot section 5 6 5 2 A D Signal Source Control To control the A D signal source three concepts should be understood They are signal type signal channel and signal range Signal Type The A D siginal sources of PCI 9812 10 are single ended...

Page 35: ...quisition l trigger polarity trigger slope This 0 value means positive trigger and the 1 value means negative trigger l trigger mode refer to section 5 3 2 5 3 1 Trigger Sources Internal Trigger An internal trigger is a software trigger The trigger event occurs when you call _9812_AD_DMA_Start function to start the operation External Analog Trigger You can use the signal on any analog input channe...

Page 36: ...Multiple Cards When multiple PCI 9812 cards are used in one system the trigger sources of every card can be connected together to provide the function of simultaneous trigger for multiple cards Please note that simultaneous trigger is not equivalent to simultaneou A D conversion The theoretical time difference between the samples on different card will be of the clock period Refer to section 5 4 f...

Page 37: ...e you want to collect data before a specified trigger event The trigger can either be an external analog trigger or digital trigger The data acquisition starts when DMA operation starts The operation stops when the external trigger event occurs If the external trigger occurs before the specified count of data specified by _9812_AD_DMA_Start function refer to section 6 2 3 is read the number of ret...

Page 38: ...nt reaches 0 the counter stops The trigger can either be an external analog trigger or digital trigger Delay Trigger Acquisition Use delay trigger acquisition in application that you want to delay the data collection after the occurrence of a specified trigger event The delay time is controlled by the value which is pre loaded in the post trigger counter register Then the counter counts down on th...

Page 39: ...n board timer counter is used as the internal A D pacer clock The frequency of the pacer is software controllable The maximum pacer signal rate is 40Mz 2 20MHz that is also the maximum sampling rate of PCI 9812 10 Note that 40MHz is the on board clock The ADC sampling frequency is generated by feeding the clock source into a frequency divider The following formula determines the ADC sampling frequ...

Page 40: ...ds Operation When multiple cards are used in one system The 4 channels on one card can achieve simultaneous conversion because of the same internal clock source However the channels between two cards can not be synchronized because the clock sources on different cards come from different sources Even when the same external clock source is applied to all cards the A D conversion time is still possi...

Page 41: ...Hz simultaneous sampling rate The high speed and simple use allow the PCI 9812 9810 to serve many applications such as image digitizing medical applications vibration testing equipment and RF or baseband signal digitization For one channel application you can only select channel 0 and the total FIFO length is 32K samples For simultaneou two channel application you have to use channel 0 and channel...

Page 42: ... 5 5 4 Maximum Acquiring Data Length The burst PCI bandwidth is 132MB sec However the effective sustained data rate is usually less than 100MB s This value may be lower when many PCI add on devices are used at the same time If the total AD data throughput is lower than the PCI bandwidth then the AD data can be put into the host memory through Bus mastering DMA and the total acquiring data length c...

Page 43: ...application is relatively high 20MB s you with have to consider that the processing of the AD data needs time and also consumes the CPU computation power There is limitation For example you can not continuously acquire data at the rate of 20MB s but CPU can only process the data at the rate of 10MB s In this case the FIFO will be full finally and the data acquisition will be discontinuous Storing ...

Page 44: ...ed software However you still need to calculate the CPU computation bandwidth to check if the continuity is possible 5 6 AD Data Format The A D data of 12 bit PCI 9812 is on the 12 MSB of the 16 bit A D data The 4 LSB of the 16 bit A D data must be truncated by software please refer to section 6 2 3 The relationship between the real signal voltage and the sampled value is shown in the following ta...

Page 45: ...0 0000 0 0000 FFC 0 64 0 0005 0 0025 C00 0 16384 0 5002 2 5010 804 0 32704 1 0000 5 0000 800 0 32768 1 0020 5 0098 The formula between the A D data and the analog value is Voltage AD_data x 1 K x Gain where Gain and K are constants For analog input range 1V 1V Gain 1 for analog input range 5V 5V Gain 5 For PCI 9812 K 2047x16 32752 for PCI 9810 K 511x64 32704 ...

Page 46: ...oping environment can be Visual Basic 4 0 or above Visual C C 4 0 or above Borland C 5 0 or above Borland Delphi 2 x 32 bit or above or any Windows programming language that allows calls to a DLL It provides the C C VB and Delphi include files 5 1 Libraries Installation Please refer to the Software Installation Guide for the detail information about how to install the software libraries for DOS or...

Page 47: ...dows 95 DLL driver e g W_9812_Initial 5 2 2 Data Types We defined some data type in Pci_9812 h DOS and Acl_pci h Windows 95 These data types are used by NuDAQ Cards library We suggest you to use these data types in your application programs The following table shows the data type names and their range Type Name Description Range U8 8 bit ASCII character 0 to 255 I16 16 bit signed integer 32768 to ...

Page 48: ... As Long op_base_address As Integer pt_base_address As Integer irq_no As Integer pci_master As Integer As Long Argument card_number the card number of PCI 9812 10 to be initialized totally 10 cards can be initialized the valid card numbers are 0 9 op_base_address the physical location of S5933 operation Registers in I O space pt_base_address the physical location of add on registers in pass throug...

Page 49: ...n operation of A D conversion N times with DMA data transfer It will take place in the background which will not stop until the Nth conversion has been completed or until your program executes _9182_AD_DMA_Stop to stop the operation After executing this function it is necessary to check the status of the operation by using the function _9812_AD_DMA_Status Syntax C C DOS int _9812_AD_DMA_Start int ...

Page 50: ... 1 DATA N 16 bit 16 bit 16 bit 16 bit 16 bit 16 bit 16 bit Every 16 bit data D11 D10 D9 D1 D0 b3 b2 b1 b0 where D11 D10 D0 A D converted data 9812 or D11 D10 D2 A D converted data 9810 b2 b1 b0 digital input data from channel DI2 DI1 DI0 b3 trigger detection flag 0 no trigger is detected 1 trigger is detected memID Win 95 the memory ID of the allocated system DMA memory In Windows 95 environment b...

Page 51: ...nt status U32 start_idx Visual Basic Windows 95 W_9812_AD_DMA_Status ByVal card_number As Long count As Long status As Long start_idx As Long As Long Argument card_number the card number of PCI 9812 10 to be selected status status of DMA data transfer 0 DMA_done 1 DMA_continue 2 DMA_wait_trig 3 DMA_wait_delay start_idx The index where the data start from in user s buffer i e the sequence of read d...

Page 52: ...t card_number U32 count Visual Basic Windows 95 W_9812_AD_DMA_Stop ByVal card_number As Long count As Long As Long Argument card_number the card number of PCI 9812 to be selected count the number of A D data that has been transferred Return Code PCICardNumErr PCICardNotInit NoError 6 8 _9812_Set_Clk_Src Description This function is used to specify the ADC clock source Syntax C C DOS int _9812_Set_...

Page 53: ... PCICardNotInit InvalidClkSrc NoError 6 9 _9812_Set_Clk_Rate Description This function is used to specify the clock divider for ADC clock The valid number of the clock divider is 2 4 6 8 1024 Syntax C C DOS int _9812_Set_Clk_Rate int card_number U16 clk_div C C Windows 95 int W_9812_Set_Clk_Rate int card_number U16 clk_div Visual Basic Windows 95 W_9812_Set_Clk_Rate ByVal card_number As Long ByVal...

Page 54: ...U16 post_trig_cnt Visual Basic Windows 95 W_9812_Set_Trig ByVal card_number As Long ByVal trig_mode As Long ByVal trig_src As Long ByVal trig_pol As Long ByVal trig_lvl As Long ByVal post_trig_cnt As Integer As Long Argument card_number the card number of PCI 9812 to be selected trig_mode selected trigger mode The valid values are the following SOFT_TRIG Software trigger POST_TRIG Post trigger PRE...

Page 55: ...C C Library 47 trig_lvl trigger level The relationship between the 8 bit trigger level and the trigger voltage is shown in section 4 5 ...

Page 56: ...ws 95 system to allocate a block of contiguous memory for DMA transfer This function is only available in Windows 95 version Syntax C C Windows 95 int W_9812_Alloc_DMA_Mem U32 buf_size HANDLE memID U32 linearAddr Visual Basic Windows 95 W_9812_Alloc_DMA_Mem ByVal buf_size As Long memID As Long linearAddr As Long As Long Argument buf_size Bytes to allocate Please be careful the unit of this argumen...

Page 57: ...C C Library 49 ...

Page 58: ...9812_Get_Sample Description For the language without pointer support such as Visual Basic programmer c an use this function to access the data in DMA buffer This function is only available in Windows 95 version Syntax C C Windows 95 int W_9812_Get_Sample U32 linearAddr U32 index I16 ai_data Visual Basic Windows 95 W_9812_Get_Sample ByVal linearAddr As Long ByVal idx As Long ai_data As Integer As L...

Page 59: ... to optimize the accuracy This chapter will guide you to calibrate your PCI 9812 10 to an accurate condition 7 1 What you need Before calibrating your PCI 9812 10 card you should prepare some equipments for the process Calibration utility Once the program is executed it will guide you to do the calibration This program is included in your delivered package A voltage calibrator or a very stable and...

Page 60: ... 7 1 Function of VRs 7 3 A D Calibration 7 3 1 AD Calibration for Channel 0 1 Apply a 1V input signal to A D channel 0 and trim the VR5 to obtain the range of the average reading of channel 0 is within 2046 6 0 1 9812 or 510 9 0 1 9810 2 Apply a 0V input signal to A D channel 0 and trim the VR1 to obtain the range of the average reading of channel 0 is within 0 2 3 Repeat step 1 and step 2 adjust ...

Page 61: ...Calibration 53 ...

Page 62: ...dures and description can be found in the utility Users only need to run the software calibration utility and follow the procedures You will get the accurate measurement data When used for the first time the PCI 9812 10 is already calibrated by the factory before shipping So users need not calibrate the PCI 9812 10 when you get it ...

Page 63: ...tions System Configuration Calibration and Functional Testing This utility is designed as menu driven based windowing style that is it provides not only the text messages for operating guidance but also graphics to instruct you how to set hardware configuration correctly This utility is described in t he following sections ...

Page 64: ...INK DOS 9812 Util C 9812UTIL The following diagram will be displayed on the screen The message at the bottom of each window guides you how to select an item go to the next step and change the default settings PCI 9812 10 Utility Rev 1 0 Copyright 1995 1997 ADLink Technology Inc All rights reserved F1 Configuration F2 Calibration F3 Function testing Esc Quit Select function key F1 F3 or press Esc t...

Page 65: ...indow shows the setting items that you have to set before using the PCI 9812 10 card The following diagram will be displayed on the screen as you choose the Configuration function from main menu Configuration of PCI9812 10 1 Card Type 9812 2 ADC Trigger Source CH0 3 Timer Clock Source Internal 6 AD Input Range Bipolar 1V 1V Up Down Select Item PgUp PgDn Change Setting ...

Page 66: ... menu list The calibration item menu is displayed on the screen After you select one of the calibration item from the menu a calibration window will appeor The upper window shows the detailed procedures which you have to follow when proceeding the calibration The instructions will tell you how to calibrate each item step by step The bottom window shows the layout of PCI 9812 10 In addition the pro...

Page 67: ...Software Utility 59 For example if you select 3 the following figure will be displayed on the screen ...

Page 68: ...r mode trigger signal polarity trigger level channel number and post trigger count for middle trigger and delay trigger After you finishing the setting mentioned above push Enter key to start performing the testing function With this function you can test and view the different effect of various trigger modes In addition an arrow shown on the screen indicate the trigger position If the trigger sou...

Page 69: ...Software Utility 61 ...

Page 70: ...ts specifications or if the serial number has been removed Seller does not assume any liability for consequential damages as a result from our product uses and in any event our liability shall not exceed the original selling price of the equipment The equipment warranty shall constitute the sole and exclusive remedy of any Buyer of Seller equipment and the sole and exclusive liability of the Selle...

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