ADLINK Technology NuDAQ PCI-9812/10, User Manual

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Operation Theorem
After deciding the A/D siginal source, users must decide how to
trigger the A/D conversion and define/control the trigger source. The
A/D converter will start to convert the siginal to a digital value when
a trigger condition is met. The PCI-9812/10 provides five trigger
modes, please refer to section 5.3
The A/D clock is controlled by internal clock or external clock source.
The detailed operation of the A/D clock source is described in
section 5.4.
At the end of an A/D conversion, the A/D data is buffered in a FIFO.
The total FIFO size on PCI-9812/10 is 32K samples. This buffer
size is relative to the highest data transfer rate. The A/D data
should be transferred into PC’s memory for further processing. The
PCI-9812/10 uses DMA to transfer the A/D data to host memory.
Please refer to section 5.5.
To process A/D data, programmer should know about the A/D data
format. Please refer ot section 5.6.
5.2 A/D Signal Source Control
To control the A/D signal source, three concepts should be
understood, They are signal type, signal channel and signal range.
Signal Type
The A/D siginal sources of PCI-9812/10 are single ended(SE).
Numbers of Channel
There are four channels in SE mode. The channel number is
controlled by the ADC Channel Enable Register. Please refer to
section 4.2.
Signal Range and Input impedance
The proper signal range is important for data acquisition. The
available signal input ranges for 9812/10 are
±
5V or
±
1V, which are
set by soldering the copper pads on the PCB. The input impedance
for high speed applications should also be considered. The
selectable input impedance values are 50 Ohm, 1.25 K, 15M ohm.
Please refer to section 3.2 for details.