cExpress-TL User’s Guide
PICMG COM.0 R3.0
Page 50
Copyright © 2021 ADLINK Technology, Inc.
4.4.5
DDI3 Port
Name
Pin #
Displayport (DP)
HDMI
DDI
DDI3_PAIR0-
C39
C40
DP
DP3_LANE0-
TMDS
TMDS3_DATA2-
DDI
DDI3_PAIR1-
C42
C43
DP
DP3_LANE1-
TMDS
TMDS3_DATA1-
DDI
DDI3_PAIR2-
C46
C47
DP
DP3_LANE2-
TMDS
TMDS3_DATA0-
DDI
DDI3_PAIR3-
C49
C50
DP
DP3_LANE3-
TM
TMDS3_CLK-
DDI3_HPD C44
DP3_HPD
HDMI3_HPD
DDI3_CTRL C36
HMDI3_CTRLCLK
DDI3_CTRLCLK_AUX- C37
DP3_AUX-
HMDI3_CTRLDATA
DDI3_DDC_AUX_SEL C38
DDI3_DDC_AUX_SEL DDI3_DDC_AUX_SEL
Note
:
Dual Mode (HDMI and DisplayPort on the same pins) implementations may be realized. This is desirable for SOCs that natively implement this
capability. With such SOCs, the primary Dual Mode implementation challenge is that the HDMI_CTRL_DAT and HDMI_CTRL_CK lines are DC
coupled, but the /- pair must be AC coupled. A set of FET switches is usually used to sort this out. The FET gates can be controlled by
the AUX_SEL pin function.
