cExpress-TL User’s Guide
PICMG COM.0 R3.0
Page 43
Copyright © 2021 ADLINK Technology, Inc.
4.4.2
PCI Express
Name
Pin #
Description
I/O
PU / PD
Comment
P
PCIE_TX6-
D19
D20
PCI Express channel 6, Transmit Output differential pair.
O PCIE
AC coupled on Module
By a PCIe switch, project basis
P
PCIE_RX6-
C19
C20
PCI Express channel 6, Receive Input differential pair.
I PCIE
AC coupled off Module
By a PCIe switch, project basis
P
PCIE_TX7-
D22
D23
PCI Express channel 7, Transmit Output differential pair.
O PCIE
AC coupled on Module
By a PCIe switch, project basis
P
PCIE_RX7-
C22
C23
PCI Express channel 7, Receive Input differential pair.
I PCIE
AC coupled off Module
By a PCIe switch, project basis
Note
: PCIe Lane 5, 6, 7 are supported by PCIe switch, by project basis
4.4.2.1.
PCH HSIO Lane Assignments
Name
HSIO name on SOC
Comment
PCIE0 HSIO
4
PCIE1 HSIO
5
PCIE2 HSIO
6
PCIE3 HSIO
7
PCIE4 HSIO
9
PCIE5 N/A
BOM option support by project basis through a PCIe switch
PCIE6 N/A
BOM option support by project basis through a PCIe switch
PCIE7 N/A
BOM option support by project basis through a PCIe switch
