Actia IHMI, User Manual

Page: 29 / 52

DOC 02110-1 ACTIA PCs Page 29 / 52
PROGRAMMING INTERFACES
Several programming interfaces are provided for the operating system and the application to access IHMI v2
functions. Those functions are connected to various buses or controllers and are driven through different
standard and proprietary programming interfaces.
Function
Bus Controller Interface Manufacturer
TFT display Video HD Graphics Intel
Touch Screen USB Touch Screen HID mouse ACTIA PCs
Ethernet PCIe i210 Intel
CAN LPC SJA1000 Philips
WiFi PCIe AR9382 Atheros
GSM USB MC75i/PHS8 Serial port Cinterion
GPS USB NEO-M8 Serial port uBlox
Audio HD-Audio 92HD73E IDT
Inputs/Outputs LPC/USB Proprietary ACTIA PCs
Power Management I2C Proprietary ACTIA PCs
Accelerometer Power Management Proprietary ACTIA PCs
Note: At software level, the LPC bus is equivalent to the standard ISA bus.
Refer to the corresponding documentation for standard or manufacturer specific interfaces. ACTIA PCs
specific interfaces are described here.
Inputs/Outputs
In order to provide compatibility with previous ACTIA PCs embedded computers, logical inputs and logical
outputs of the mixing panel can be accessed through 2 interfaces. Because of those two interfaces, output
states are the logical OR of the corresponding bits. It means that the OUTn relay will be closed if bit n is set to
1 in at least one OUTPUT_REG.
The legacy interface is the vehicle specific interface. It consists of a set of registers in the I/O space of the
ISA bus at base address 0300h.
Output control register
OUTPUT_REG (base+1, W)
- bit 0 : OUT0 output state (0=relay opened, 1=relay closed)
- bit 1 : OUT1 output state (0=relay opened, 1=relay closed)
- bit 2 : OUT2 output state (0=relay opened, 1=relay closed)
- bit 3 : OUT3 output state (0=relay opened, 1=relay closed)
- bits 4 and 5 : not used
- bit 6* : GSM on signal state (0=inactive, 1=active)
- bit 7 : GSM emergency off signal state (0=inactive, 1=active)
*This bit could be used to switch the GSM module on again (ex after AT^SMSO AT command or after an
emergency off). During system power up the GSM is automatically switched on.
Input status register
INPUT_REG (base+2, R)
- bit 0 : IN0 input state (0=low level, 1=high level)
- bit 1 : IN1 input state (0=low level, 1=high level)
- bit 2 : IN2 input state (0=low level, 1=high level)
- bit 3 : IN3 input state (0=low level, 1=high level)
- bits 4 to 7 : not used
The state of bits 0 to 3 reflects the current state of the corresponding input. There is no debouncing circuitry,
so debouncing must be performed by software.