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CIRCUIT DESCRIPTIONS
D60WLCD - 923-03486
3-26
094A - SERVICING
COLOR UNIFORMITY CORRECTION (ET7040K0A)
SCOPE
ET7040K0A superimposes a correction voltage on the
video signal in order to improve color uniformity of an
LCD projector image.
FEATURES
1) Operation clock frequency: Max. 80MHz
2) This IC superimposes the correction data on the
digital video signal (8 bit or 10 bit ) by digital
signal processing.
3) The number of the bits of the input and output
video data can be chosen from the following two
modes.
a) Video signal input: 8 bit, Video signal output
after correction: 9 bit.
b) Video signal input: 10 bit, Video signal output
after correction: 10 bit.
4) The number of the correcting divisions on screen
can be chosen from the following three modes.
a) Horizontal 32 divisions x Vertical 24 divisions.
(Correction data setting points: horizontal 33
points x vertical 25 points).
b) Horizontal 16 divisions x Vertical 12 divisions.
(Correction data setting points: horizontal 17
points x vertical 13 points)
c) Horizontal 8 divisions x Vertical 6 divisions.
(Correction data setting points: horizontal 9
points x vertical 7 points)
5) Except for the correcting points, correction data
is interpolated by the operating circuit in this IC.
6) Correction data setting has 3 brightness levels
(MAX, MID, MIN).
a) If video signal input is 8 bit,setting range of
MAX and MID and MIN are 8 bit (0-255).
b) If video signal input is 10 bit, setting range of
MAX and MID and MIN are 10 bit (0-1023).
7) Interpolations of correction data between bright-
ness levels: Correction data is the same value as
MAX for brightness beyond MAX. Correction data
is the same value as MIN for brightness under MIN.
8) Scan inverting function of horizontal and verti-
cal. Changed correction data positions with switch
setting or serial bus control.
9) Switching of the correction mode and through
mode is possible.
10) Data setting is serial bus control (3 wire)
12) Corresponds with the color correction system
(DAVIS Co. Ltd). By using this system, correction
data are made easily.
13) Package 128 pin QFP (20mm x 14mm)
BLOCK DIAGRAM
HSCAN
VSCAN
SELECT
HRESET
ROUT0 9
GOUT0 9
BOUT0 9
VRESET
STRB
DATA
SCLK
DCLCK
Adder
RIN0 9
GIN0 9
BIN0 9
Correction data interpolations
Output
Switching
Correction data
setting table
Serial-parallel
conversion
Data Setting Points
Maximum
24 division
Maximum 32 division
Correction data setting
points (Except for the
correcting points, correction
data is interpolated)
Liner interpolations of correction data between MIN-MID and MID-MAX
MAX
MID
MIN
Содержание D60WLCD Series
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