YASKAWA GPD 506/P5, Техническое руководство, Страница: 32 / 66

The Message Format 6-11
No Response Message
The slave disregards the command message and does not return the respond message in the
following cases:
1. In simultaneous broadcasting of data (slave address field is 0), all slaves execute but do
not respond.
2. When a communication error (overrun, framing, parity, or CRC-16) is detected in the
command message.
3. When the slave address in the command message does not coincide with the address
set in the slave.
4. When the time interval of data composing the message exceeds the GPD 506’s set 2
second time-out detection period.
5. When the command message data length is not proper.
CRC-16
At the end of the message, the data for CRC error checking is sent in order to detect errors in
signal transmission. In Modbus RTU, the error check is conducted in the form of a CRC-16 (Cyclical
Redundancy Check). The CRC field checks the contents of the entire message. It is applied
regardless of any parity check method used for the individual characters of the message.
The CRC field is two bytes, containing 16-bit binary value. The CRC value is calculated by the
transmitting device, which appends the CRC to the message. The receiving device recalculates a
CRC during receipt of the message, and compares the calculated value to the actual value it
received in the CRC field. If the two values are not equal, an error results.
The CRC is started by first preloading a 16-bit register to all 1’s. Then a process begins of applying
successive 8-bit bytes of the message to the current contents of the register. Only the eight bits of
data in each character are used for generating the CRC. Start and stop bits, and the parity bit (if
one is used) do not apply to the CRC.
During generation of the CRC, each 8-bit character is exclusive ‘OR’ed with the register contents.
Then the result is shifted in the direction of the least significant bit (LSB), with a zero filled into the
most significant bit (MSB) position. The LSB is extracted and examined. If the LSB is a 1, the
register is then exclusive ‘OR’ed with a preset, fixed value (A001h). If the LSB is a 0, no exclusive
OR takes place.
This process is repeated until eight shifts have been performed. After the last (eighth) shift, the next
8-bit byte is exclusive ‘OR’ed with the register’s current value, and the process repeats for eight
more shifts as described above. The final content of the register, after all the bytes of the message
have been applied, is the CRC value.
For applications using a host computer, a detailed example of a CRC generation using Quick Basic
is shown on the following page.