Yamaha Clavinova CVP-405, Руководство по обслуживанию

Страница: 42 / 194

CVP-405/CVP-405PE/CVP-405PM
42
1 GND1 - Ground
2 R-IN I Analog R signal input
3 G-IN I Analog G signal input
4 B-IN I Analog B signal input
5 N.C. - Not used
6 fsc-IN I Subcarrier input
7 NTSC/PAL-IN I NTSC/PAL selector
8 N.C. - Not used
9 N.C. - Not used
10 CSYNC-IN I Composite sync signal input
11 N.C. - Not used
12 Vcc1 - Power 5 V
13 N.C. - Not used
14 N.C. - Not used
15 CROMA-OUT O Chrominance signal output
16 Y-OUT O Y-signal output
17 Y-TRAP - Luminance signal band control
18 N.C. - Not used
19 Vcc2 - Power 5 V
20 VIDEO-OUT O Composite video signal output
21 B-OUT O Analog B signal output
22 G-OUT O Analog G signal output
23 R-OUT O Analog R signal output
24 GND2 - Ground
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
MB3516APF-G-BND-EF (X2314A00) RGB ENCODER
DM: IC606
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BGRES
RXV
DD25
RX+
RX-
RXGND
TXGND
TX+
TX-
TXV
DD25
SD7
SD6
SD5
SD4
SD3
GND
SD2
SD1
SD0
EEDIO
EECK
EECS
SD15
V
DD
SD14
I/O
-
I/O
I/O
-
-
I/O
I/O
-
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
O
O
I/O
-
I/O
Bandgap pin
Power 2.5 V
TP RX input
RX ground
TX ground
TP TX output
Power 2.5 V
Processor data bus
Digital ground
Processor data bus
IO data to EEPROM
Clock to EEPROM
Chip select to EEPROM
Processor data bus
Digital power 3.3 V
Processor data bus
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48 SD13
SD12
SD11
SD10
SD9
V
DD
SD8
CMD
GND
INT
IOR
IOW
CS
LED2
LED1
PWRST
TEST
V
DD
X2
X1
GND
SD
RXGND
BGGND
I/O
I/O
I/O
I/O
I/O
-
I/O
I
-
O
I
I
I
O
O
I
I
-
O
I
-
I
-
-
Processor data bus
Digital power 3.3 V
Processor data bus
Command type
Digital ground
Interrupt request
Processor read command
Processor write command
Chip select
Link/Active LED
Speed LED
Power on reset
Operation mode
Digital power 3.3 V
Crystal 25 MHz out
Crystal 25 MHz in
Digital ground
Fiber-optic signal detect
RX ground
Bandgap ground
DM9000AEP (X7029A00) LAN CONTROLLER
DM: IC607
PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DV
SS
DV
DD
MCLK
PDN
BICK
SDATA
LRCK
SMUTE/CSN
DFS0/CAD0
DEM0/CCLK
DEM1/CDTI
DIF0
DIF1
DIF2
-
-
I
I
I
I
I
I
I
I
I
I
I
I
Digital ground
Digital power 3.3 V
Master clock input
Power-down mode
Audio serial data clock
Audio serial data input
L/R clock
Soft mute/Chip select
Sampling speed mode select/Chip address 0
De-emphasis enable 0/Control data clock
De-emphasis enable 1/Control data input
Digital input format
15
16
17
18
19
20
21
22
23
24
25
26
27
28 TTL
VREFL
VREFH
AV
DD
AV
SS
AOUTR-
AOUTR+
AOUTL-
AOUTL+
VCOM
P/S
TST1/DZFL
TST2/CAD1
ACKS/DZFR
I
I
I
-
-
O
O
O
O
O
I
O
I
I/O
CMOS/TTL level select
Low level voltage reference input
High level voltage reference input
Analog power 5 V
Analog ground
Rch negative analog output
Rch positive analog output
Lch negative analog output
Lch positive analog output
Common voltage output
Parallel/serial select
Test 1/Lch zero input detect
Test 2/Chip address 1
Master clock auto setting mode/Rch zero input detect
AK4396VF-E2 (X8324A00) DAC (Digital to Analog Converter)
DM: IC318