Xycom 4115T, Руководство пользователя

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4115T Light Duty Industrial PC Chapter 3 – POS-478 CPU Control Board and BIOS Setup
20 143926(A)
JP3: 24-bit or 18-bit LCD Selection (for one pixel). Tie to DVCC to select non-
conventional color mapping 24 bit LCD only. Tie to GND to select 18-bit LCD.
This setting also is for 24-bit LCD with conventional color mapping.
JP3 Description
2-3 GND
1-2 DVCC
JP4: Tie to DVCC, DS90C2501 will invert CLKINP and CLKINM signals internally.
This feature can save PCB layout error by accidentally swap CLKINP and CLKINM
pins. Default setting is DVCC.
JP4 Description
1-2 DVCC
2-3 GND
JP5: Tie DUAL pin to DVCC for single pixel in to single pixel out operation. Tie
DUAL pin to 1/2 DVCC for single pixel in to dual pixel out operation. This is for
LCD requires dual pixel input. Default setting is DVCC.
JP5 Description
1-2 DVCC
2-3 GND
OPEN
1/2 DVCC