62
Watchdog Timer Setting
The watchdog timer is a circuit that may be used from your program software to
detect system crashes or hang-ups. The watchdog timer is automatically disabled
after reset.
Once you have enabled the watchdog timer, your program must trigger the
watchdog timer every time before it times out. After you trigger the watchdog
timer, it will be set to non-zero value to watchdog counter and start to count down
again. If your program fails to trigger the watchdog timer before time-out, it will
generate a reset pulse to reset the system.
The factor of the watchdog timer time-out constant is approximately 1 second.
The period for the watchdog timer time-out is between 1 to FF timer factors.
If you want to reset your system when watchdog times out, the following table
listed the relation of timer factors between time-out periods.
Time Factor
Time-Out Period
(Seconds)
Time-Out Period
(Minutes)
1
1
1
2
2
2
3
3
3
4
4
4
5
5
5
“
“
“
“
“
“
“
“
“
FF
FF
FF
Содержание TCD-N2600-C2G2-2
Страница 1: ...ii TCD N2600 C2G2 2 DIN miniPC User s Guide...
Страница 9: ...6...
Страница 15: ...12 2U Rack Mount Kit...
Страница 19: ...16 7 Connecting the Audio EAR Phone EAR Phone...
Страница 37: ...34 Super IO Configuration This section describes the function of Super I O settings...
Страница 41: ...38 Chipset This section describes the configuration of the board s chipsetfeatures Host Bridge South Bridge...
Страница 71: ...68...
Страница 80: ...77 145 Appendix Dimension a TCD N2600 C2G2 2 50 4 102...
Страница 81: ...18 2 10 5 REF 18 REF On 35mm Din Rails EN 50022 1977 78 72 REF...
Страница 82: ...37 5 REF 8 c TCD N2600 C2G2 2 5311K1 100 57 4 79 8 16 REF 75 100...