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PZ-TIO Manual 

 

Version 1.01  

 

© 2022 XIA LLC 

 

1  Introduction 

The PZ-TIO is an input/output carrier board for a Zynq System on Module

1

 (SoM). The 

Zynq is a combination of an FPGA (Programmable Logic, PL) with an ARM processor 
(Processing System, PS). The PL can implement the White Rabbit IP core, and additional 
logic to route input and output signals – if desired synchronous with a White Rabbit master 
clock to sub-nanosecond precision. The PS can run Ubuntu 18 with gcc, webserver, etc; it 
has USB and Ethernet peripherals and 1GB of memory.  
The PZ-TIO carrier board connects the PL to ~40 GPIO lines and 3 SFP interface ports. 
All of the SFP interfaces can be replaced by GPIO connectors, and two

2

 are capable of 1 

Gbps  Ethernet  with  White  Rabbit  time  synchronization,  when  using  replaceable 
daughterboards  for  the  White  Rabbit  clocking  circuitry.  The  PS  can  be  accessed  via 
USB/UART and 10/100/100M Ethernet port (alternatively  a PTP

3

 compatible 10/100M 

Ethernet port).  
At this time, the PZ-TIO should not be considered a commercial product. XIA does not 
promise any particular functionality or suggests its use as part of a setup for the readout of 
radiation detectors

4

, which is XIA’s main line of business. Instead, it should be seen as a 

byproduct of  recent R&D

5

.  In that development, we benefited from a  number of  freely 

available designs and concepts, and their supporting communities. We therefore spent a 
little  extra  time  to  pull  them  together  in  an  evaluation  board  of  sorts  and  make  them 
available to the community in combination. We provide the PZ-TIO “as is”, but not for 
free  --  there  are  real  production  costs.  We  will  try  to  answer  questions  as  “moderately 
experienced implementers” as time allows, but we are not the creators of, or experts in, the 
designs above. At this point, all the PZ-TIO really does is allowing a PicoZed to blink an 
LED or toggle an output pin in sync with a White Rabbit or other PTP master. Legally, we 
are [probably] only selling a circuit board – not even the PicoZed itself – that 

may

 allow 

you to run firmware and software you obtain separately. However, the hope is that this is 
still useful to other developers.  
Note: some functions not fully tested are highlighted in yellow 
 
 
 
 
 
 
 
 

                                                      

1

 Model Avnet PicoZed 7015 

2

 Currently only one is tested 

3

 IEEE 1588 Precision Time Protocol 

4

 Though it might in the future, with suitable firmware for specific applications 

5

 See Pixie-Net XL on XIA’s website 

Содержание PZ-TIO

Страница 1: ...01 5761 http www xia com Information furnished by XIA LLC is believed to be accurate and reliable However no responsibility is assumed by XIA for its use or for any infringements of patents or other r...

Страница 2: ...1 1 4 Software and Firmware Overview 11 1 5 Support 11 2 Setup 12 2 1 Power 12 2 2 Serial Port USB UART 12 2 3 SSH login 13 2 4 Web Interface 13 2 5 SMB Samba 14 2 6 Required Initial Linux Commands 14...

Страница 3: ...0 Hardware Information 33 10 1 Board Architecture 33 10 2 Connections 33 10 2 1 Data Connectors 33 10 2 2 MMCX Connectors for Clocks and Triggers 34 10 2 3 PMOD and HDMI Connectors for GPIO 34 10 2 4...

Страница 4: ...to use Voltage Ratings Signals on the inputs and outputs must not exceed 3 3V Please review the pinout in the appendix before making any connections Servicing and Cleaning To avoid personal injury and...

Страница 5: ...er this warranty a to repair damage resulting from attempts by personnel other than XIA LLC representatives to repair or service the product or b to repair damage resulting from improper use or connec...

Страница 6: ...quotation refers to window titles and quotations from other sources Options indicates the window accessed via Tools Options Italics Italic text denotes a new term being introduced or simply emphasis...

Страница 7: ...part of a setup for the readout of radiation detectors4 which is XIA s main line of business Instead it should be seen as a byproduct of recent R D5 In that development we benefited from a number of...

Страница 8: ...features and capabilities 40 GPIO connections to PicoZed Zynq SOM 3 SFP interfaces Supports White Rabbit IP core implementation in PicoZed by providing clocking circuitry for 2 SFPs on daughterboards...

Страница 9: ...ectors are right angle headers not stuffed by default 3 3V power from PZ TIO to peripheral 1 microHDMI 1 microHDMI for buffered 5V TTL input or output signals 6 outputs 7 inputs 5V power from PZ TIO t...

Страница 10: ...1588 PTP timers and adjust local clock to network clock master C software to define PTP timed triggers Table 1 1 Specifications for the PZ TIO 1 3 System Requirements The system considered here consi...

Страница 11: ...ded via the web page or copied over the network Configuration parameters are stored in an ini file that can be edited by the user to adjust parameter settings Firmware code for the PL on board pulse p...

Страница 12: ...the 12V DC power plug A green LED will blink when power is on and the PL configured properly It will be continuously on if the White Rabbit IP core is fully synchronized 2 2 Serial Port USB UART The s...

Страница 13: ...y the one it had before IP addresses seem fairly persistent through power cycles To connect open a terminal and make connection to the PZ TIO s IP address Default ID PW is root xia17pxn please change...

Страница 14: ...he web browser from this directory For convenience it contains a release of all XIA SW functions and is used as the default working directory Not required for web operations page 2 Apply settings to F...

Страница 15: ...with the text RUN_TYPE 1281 4 To mount a USB drive7 e g to copy data or SW updates type mount dev sda1 mnt usb var is not a suitable directory to mount the USB stick as it confuses the web server 5 T...

Страница 16: ...be used instead of eth1 2 On the Windows PC here Windows 7 go to Start Control Panel Network and Sharing Center Change Adapter Settings Local Area Connection In the Local Area Connection Properties di...

Страница 17: ...s ini should be considered a read only file Editing can be accomplished with a built in Linux editor through the terminal for example VI or by opening the file in a Windows editor through the SMB file...

Страница 18: ...ve can be used to operate the system A few examples are listed in the following sections 3 3 1 Terminal At the most basic level users can log in to the PZ TIO with a terminal program and execute the C...

Страница 19: ...ation Not yet implemented As an alternative to the terminal entry and execution of the C programs to set up and read status e g progfippi and runstats there is a moderately secure web page that allows...

Страница 20: ...neration and execution of files from any remote user the webserver has been set up to require authentication to access this webpage Details of the setup are described in section 10 The default user ID...

Страница 21: ...RS csv cgistats prints them as a webpage to std out which can be piped into the webserver this is displayed as the Status webpage These functions can be used for development setup and diagnostics for...

Страница 22: ...MHz output 25 MHz on Y1 FPGA and Y3 External Mode 4 Input 25 MHz output 50 MHz on Y1 FPGA Y2 backplane and Y3 External Mode 5 Input 50 MHz output 50 MHz on Y1 FPGA Y2 backplane and Y3 External Output...

Страница 23: ...owsing to the PZ TIO s IP address will bring up index html from which all other pages can be accessed 5 1 index html This is the home page for the PZ TIO At the side of the page there are a few shortc...

Страница 24: ...javascript that links to the file RS csv The file is generated by executing runstats on the PZ TIO terminal A similar page reading and displaying the data can be generated by the script cgistats cgi...

Страница 25: ...will be translated by the progfippi routine into values and bit patterns and then written into PL input registers Several control bit patterns are broken out as one bit per line For other less common...

Страница 26: ...RUNTIME_CTRL 0 or 1 Reserved for conditioning the run start with White Rabbit time UDP_PAUSE 10 100 00 Parameters reserved for generating UDP data packages sent out via White Rabbit interface DEST_MAC...

Страница 27: ...er Parameter_O Name of output parameter Value_O Value of output parameter The units of the reported values are generally in seconds nanoseconds degrees Celsius or counts per seconds For full definitio...

Страница 28: ...th same address At this time the address space is derived from the Pixie Net XL and has several reserved unused registers Register Address R W Description bit CSRIN 0x000 R W Run Control Register bits...

Страница 29: ...atus info bits 0 Status of the VETO input 1 Status of the SYNC input 2 reserved real time 3 PTP trigger 3 from DP86430 4 PTP trigger 4 from DP86430 5 PTP trigger 8 from DP86430 6 7 unused and 0 8 15 f...

Страница 30: ...sourceforge net ptp mii tool source code on SD card or at https github com giftnuss net tools original mii tool or at http support xia com default asp W772 XIA modification Linux kernel source code p...

Страница 31: ...ps change owner to wwww data lightttpd in webops make links to ini jpg js html files from var www white data files created by webops blue links green webop specific html page g i2c tools samba see con...

Страница 32: ...t from PixieNetCommon c and compute T in Celsius To automatically give permission to all users to dev uio0 avoiding the initial chmod command insert the following line in the file etc udev rules d 10...

Страница 33: ...gic in the PicoZed Zynq FPGA side PL can be programmed to route signals from input to outputs some are bidirectional and to compute results from the signals that are visible to the Linux OS on the Pic...

Страница 34: ...White Rabbit related clock J803 Trigger output 3 3V TTL Output signal can be chosen by jumper and configured in FPGA e g as White Rabbit PPS signal J400 Sync input 3 3V TTL 5V compatible J401 Veto inp...

Страница 35: ...PL is jumpered over to the PS 2nd UART interface MIO50 51 to be able to control the WR setup from the Linux OS Figure 10 3 Pinout of test connectors 10 2 5 Daughterboard Connections Figure 10 4 Pinou...

Страница 36: ...k and 20 and 62 5 MHz for WR IP core tunable by the WR IP core 3 A SI5394 programmable PLL chip This chip has multiple clock inputs external local oscillator fixed 25 MHz an optional 2nd WRclkDB with...

Страница 37: ...O operates from its local clock but clock frequencies and timestamps are adjusted by software that uses special PTP messages exchanged through the data network With suitable network configurations thi...

Страница 38: ...l it assigns itself as the clock master then start ptp4l in the second third PZ TIO with the added s option to force it to clock slave mode It is often more convenient to start LinuxPTP as a service o...

Страница 39: ...re in the PicoZed PL as follows SFP card cage with appropriate connections to FPGA fabric and GTX data pins for the 1Gbps Ethernet connection A number of specific SFP modules and cables are recommende...

Страница 40: ...n 1 01 2022 XIA LLC 40 10 8 PicoZed configuration The PicoZed can be used as purchased However please verify that the boot mode is set to SD card boot SD card boot Jumper switches both to SW1 QSPI boo...

Страница 41: ...1 C and H files Besides the C programs listed in section 4 the files PixieNetCommon c h include I2C subroutines functions to read temperature and a function to write status registers to file or stand...

Страница 42: ...ing to an address in the file Up to 4096 registers are supported by the core the current firmware implements 64 of them and uses only a few 11 1 4 Status Registers cgi vs file vs page The status regis...

Страница 43: ...rom the xillybus documentation Provides register I O between C programs on the PS side and the PL logic Registers reduced to 16 bit 64 in and out Zynq peripheral customization Enable UART 0 1 SD card...

Страница 44: ...ace sometimes scrambles the output into special characters Use of SSH is recommended except for finding out the PZ TIO s IP address The booting process may occasionally hang at the u boot stage Manual...

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