PZ-TIO Manual
Version 1.01
© 2022 XIA LLC
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J300 is a microHDMI connector connected via 5V buffers to the PL. Some lines are inputs,
some are outputs, see schematic. Use without buffe5rs and 3.3V TTL is a stuffing option.
10.2.4 Test Points
Besides test points for supply voltages etc, there are two 12-pin headers for test point. Most
pins are connected to the PicoZed PL, but a few are for PicoZed PS or other signals. By
default, the WR UART interface (from the PL) is jumpered over to the PS 2
nd
UART
interface (MIO50/51) to be able to control the WR setup from the Linux OS.
Figure 10-3: Pinout of test connectors.
10.2.5 Daughterboard Connections
Figure 10-4: Pinout of WRclkDB connectors. Signal lines connect to appropriate I/O pins on the
PicoZed or its GTX clock inputs.
J700_A and J700_B are 40-pin high density connectors bringing out FPGA fabric and GTX
clock input pins. The primary purpose is to plug in a daughterboard that implements the
White Rabbit DAC controlled oscillators and related clocking circuitry. Other
daughtercards can be designed for other purposes
8
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8
Ask XIA for a TTCL compatible daughtercard
