WinSystems PPM-C407, Руководство по эксплуатации продукта

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PPM-C407/Configuration
v1.0 www.winsystems.com Page 10
7.2 I/O Port Map
The PPM-C407 uses plug-and-play (PnP) BIOS resource allocation. Care must be taken
to avoid contention with resources allocated by the BIOS.
The PPM-C407 utilizes a Low Pin Count to Industry Standard Architecture bridge (LPC
to ISA Bridge) to address the PC/104 bus. Most legacy PC/104 modules are I/O mapped
and function as expected. The LPC controller is the subtractive agent of the Intel Legacy
Block. All transactions not claimed elsewhere are sent to the LPC controller. The LPC to
ISA Bridge does not implement bus mastering cycles or direct memory access (DMA).
The following tables contain the I/O ports used on the PPM-C407.
Movable I/O Ranges
Device Size (bytes) Target
ACPI Power Management
(PCU) 128 ACPI_BASE_ADDR (PM1BLK): PCI[B:0,
D:31, F:0] + 40h
SMBus (PCU) 32 SMBA: PCI[B:0, D:31, F:3] + 20h
GPIO (PCU) 256 GBA: PCI[B:0, D:31, F:0] + 48h
RCBA (PCU) 1024 RCRB_BA: PCI[B:0, D:31, F:0] + F0h
PCU Fixed I/O Addresses
I/O Address Device
0000h-001Fh DMA Controller 82C37
0020h-0021h Interrupt Controller 8259 Master
0024h-0025h Interrupt Controller 8259 Master
0028h-0029h Interrupt Controller 8259 Master
002Ch-002Dh Interrupt Controller 8259 Master
0030h-0031h Interrupt Controller 8259 Master
0034h-0035h Interrupt Controller 8259 Master
0038h-0039h Interrupt Controller 8259 Master
003Ch-003Dh Interrupt Controller 8259 Master
0040h-0043h Timer counter 8254
0050h-0053h Timer counter 8254
0060h PS2 Control (data port)
0061h NMI controller
0062h 8051 download 4K address counter
0064h PS2 Control (status port)
0066h 8051 download 8-bit data port
0070h-0077h RTC Controller
PRELIMINARY