Wiener AVM16, Руководство пользователя

Страница: 14 / 33

14
A switch in the „on“ position means that the corresponding address bit should be 0. Address bits
25:11 must always be 0. If for example only switch 1 is „off“, the address range is 0x04000000 to
0x040007FC.
5.4 Software registers
There are 4 groups of address registers:
•
The first contains only registers for the control FPGA VIRTEX-5, i.e. the local bus is not
used
•
The second contains registers that are also passed through the local bus to all 4 FPGAs
serving the ADCs.
•
The third contains registers that contain values for each one of the 16 channels and
address the corresponding ADC FPGA.
•
The range of the fourth group is foreseen for access to the readout data in single mor in
block transfer mode.
The meaning and functions of the internal registers is listed in paragraphs below.
5.4.1 Overview of registers
Offset Name Write Read
0x000 ident
Version
0x004 serial serial number, 32 Bit
0x008 com_ids communication identifier
0x00C
reserved
0x010 state Status Register
0x014 dlength Data Length for
Blocktransfer as Byte
0x018 reserved
0x01C tp_dac
Level of test pulse
(DAC)
0x020 ofset_dac[4] baseline offset for all
ADC inputs
SW1 Bit Base Address
6 31 0x80000000
5 30 0x40000000
4 29 0x20000000
3 28 0x10000000
2 27 0x08000000
1 26 0x04000000
Table 1: Base Address Settings