Wayne Kerr AP10030, Руководство пользователя и обслуживания

Страница: 32 / 70

32 Wayne Kerr AP 1kW Power Supplies • Issue 2
7. CIRCUIT DESCRIPTION
General
Although specific to the AP6050, the following describes, in general, the AP3080 and
AP10030 versions. Minor variations may occur between the different units. Reference is
made to a number of diagrams. These are the schematic (giving major components and
circuit function), the control board, the front panel board, the power conversion and a
connection diagram.
Energy Conversion
The principle used is that of the ‘flyback’ converter. Energy is stored in the primary side
of the inverter transformer (TX404, schematic and power conversion diagrams) by
switching the d.c. voltage derived from the rectified mains input. Switching is
accomplished by FETs TR1a, TR2a, TR3a and TR1b, TR2b, TR3b, (schematic and
power conversion diagrams). When the primary is switched off, the polarity of the
primary winding reverses. This causes the output diode(s) D401 (schematic and power
conversion diagrams) to conduct and transfer the primary energy to the output capacitors
C404, C405, C406 and C407 (schematic and power conversion diagrams). The energy
stored in the leakage inductance of the transformer is returned to the d.c. supply via
diodes D1a and D1b. The frequency of operation is approximately 25kHz. Output
voltage/current or power is controlled by altering the ‘on’ time of the FETs.
Input Conditioning
The mains input passes through an R.F.I. filter to the auxiliary transformer, fan and
mains rectifier diodes. The soft start relay, RL301 (schematic and power conversion
diagrams), short circuits the soft start resistor, R301 (schematic and power conversion
diagrams), when the auxiliary supplies have been established, but before the oscillator is
gated to the switching FETs.
Switching
Two sections of three FETs (TR1a, TR1b, TR1c and TR2a, TR2B, TR2c) in parallel are
used to switch the primary of the inverter transformer (TX404) across the d.c. supply.
These FETs are switched on every cycle by means of the drive circuit TR6, 7, 8, 9, 10
and 11 (control board diagram) and power the drive transformer, TX402 (schematic and
power conversion diagrams). The pulse width of this drive is controlled by a pulse width
modulator circuit. The pulse width is obtained by producing a ramp from the linear rise
of current in the primary of the inverter transformer, TX404.
A toroidal current transformer, TX403, monitors the current flowing in the conversion
transformer primary. The output voltage from TX403 is generated across R46 by D21
(schematic and power conversion diagrams). The linear rise in current in the primary
produces a voltage ramp output from the current transformer.
Transistor TR12 and associated circuitry C15, C18, etc. (control board diagram) are used
to produce a secondary ramp with a non linear rate of rise. This ramp is switched on
approximately 2µs before the FETs. The two ramps are now combined to form one with
an initial fast rate of rise smoothly changing to that of the main ramp at pin 8 of IC2-C