VIPA CPU 21 Series, Руководство пользователя, Страница: 204 / 394

Chapter 7 Deployment of the CPU 21xDP Manual VIPA CPU 21x
7-12 HB103E - Rev. 05/45
DP slave parameters
With an "intelligent slave", the Profibus section writes its data areas into the
memory area of the CPU 21xDP. The assignment of the areas happens via
the "properties" of the CPU 21xDP.
The input or output areas have to be supported with an according PLC
program.
Attention!
The length values for in- and output area have to be identical to the byte
values of the master configuration. Otherwise there is no Profibus
communication possible and the master notes a slave failure!
Slave: (VIPA_CPU21x of VIPA_21x.gsd)
PB-
Adr.:1
PB-
Adr.:2
DP200V CPU21x
Master: (VIPA_CPU21xDP of VIPA04d5.gsd)
315-2DP (2AF03-0AB0)
315-2DP (2AF03-0AB0)
PB-
Adr.:5
OUT
IN
centralized periphery
.
.
.
centralized periphery
CPU 21x-2BP02
Module
Input m(Bytes)
Output (Bytes)
Module
As soon as you set a length value to 0, the concerning data does not
occupy any memory space in the CPU.
By assigning 255 (memory limit) at the parameters PRN, DIAG and STAT
you may also release memory space in the CPU.
Note!
Until CPU firmware version v2.2.0 the CPU 21x and the Profibus-DP
system support an address range from 0 to 255.
From firmware version v3.0 on, the CPU 21x and the Profibus-DP system
from VIPA support an address range from 0 to 1023.
The firmware versions are on a label at the backside of the modules.
Here 1023 is the value for deactivating PRN, DIAG and STAT .
Outline
Release CPU
areas