
Memory and I/O Map
Memory and I/O Map
M
EMORY
M
AP
The lower 1 MB memory map of the
EPM-CPU-10
is arranged as shown in the following table.
Various blocks of memory space between A0000h and FFFFFh can be shadowed. CMOS setup is
used to enable or disable this feature.
Table 18: Memory Map
Start
Address
End
Address
Comment
E0000h
FFFFFh
System BIOS, Flash Page (BIOS Ext.)
D0000h
DFFFFh
PC/104, and DOC
C0000h CFFFFh Video
BIOS
A0000h BFFFFh Video
RAM
00000h 9FFFFh System
DRAM
Note!
The memory region from E0000h-EFFFFh is controlled by the Map and Paging
Control Register.
38 – Reference
EPM-CPU-10 Reference Manual