Spartan-3E FPGA Industrial Micromodule
User Manual
TMS
TDI
TDO
TCK
GND
Vref (3.3 V)
Table 11: JTAG header (J2).
SPI Header
SPI signals are routed to / from bank 2 of
the FPGA as detailed in Table 12 and made
available on the dedicated header J3 ac-
cessible through an SPI programmer with
flying leads as described in Table 13.
Signal
FPGA pin
FPGA ball
SPI /S
IO_L01P_2
U3
SPI D
IO_L03N_2
T4
SPI Q
IO_L16N_2
N10
SPI /C
IO_L26N_2
U16
Table 12: SPI signal details (bank 2).
SPI /S
SPI D
SPI Q
SPI /C
GND
Vref (3.3 V)
Table 13: SPI header (J3).
Clock Networks
24 MHz Clock Oscillator
The module has a 24 MHz SMD clock oscil-
lator providing a clock source for both the
USB microcontroller and the FPGA as de-
tailed in Table 14.
Trenz Electronic GmbH
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