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User's Manual  l  MBa8MPxL UM 0100  l  © 2022, TQ-Systems GmbH 

 

Page  9 

 

3.1.3

 

I

2

C devices, address mapping 

The TQMa8MPxL provides four I

2

C buses. Of these, only I2C6 is provided on a pin header. All other buses are used by different 

components on the module or the mainboard. All I2C buses provided by the TQMa8MPxL have a 3.3 V level. In order to be able 

to connect 1.8 V components as well, two level converters are used on the MBa8MPxL. One is permanently connected to I2C4, 
the second can be varied in its connection, but uses I2C2 by default. 
The following block diagram shows the I

2

C bus structure. 

 
 

Video

Connectors

TQMa8MPxL

SE97BTP

Header

24LC64T

PCF85063

I2C1

I2C2

I2C6

Temperature

PCIe (M.2)

Level

shifter

PCIe Clock

MIPI_CSI[1..0]_I2C

I2C6

HDMI_I2C

3V3

1V8

HDMI_DDC

AudioCodec

PCA9450

DP Bridge

USB Hub

I2C4

Level

shifter

3V3

3V3

HDMI signal 

conditioning chip

1V8

NP

N

P

NP

 

Figure 5: 

Block diagram I

2

C bus 

 
 
 
The following table shows the addresses used on the TQMa8MPxL and the MBa8MPxL. 
 

Table 4: 

I

2

C devices, address mapping on TQMa8MPxL and MBa8MPxL 

Location 

Device 

Function 

7-bit address 

Remark 

TQMa8MPxL 

PCA9450 

System Controller 

0x25 / 010 0101b 

Should not be altered 

PCF85063 

RTC 

0x51 / 101 0001b 

Optional 

24LC64T 

EEPROM 

0x57 / 101 0111b 

Optional 

SE97BTP 

Temperature sensor 

0x1B / 001 1011b 

– 

EEPROM 

0x33 / 011 0011b 

R/W access in Protected Mode 

0x53 / 101 0011b 

R/W access in Normal Mode 

SE050 

Trust Secure Element 

0x48 / 100 1000b 

Optional 

MBa8MPxL 

TLV320AIC3204 

Audio Codec 

0x18 / 001 1000b 

N7 

SE97B 

Temperature sensor 

0x1C / 001 1100b 

D1 

EEPROM 

0x34 / 011 0100b 

D1, R/W access in Protected Mode 

0x54 / 101 0100b 

D1, R/W access in Normal Mode 

TUSB8041 

USB 3.0 Hub 

0x44 / 100 0100b 

D39, optional 

9FGV0441A 

Clock Generator 

0x6A / 110 1010b 

D47 

TC9595XBG 

MIPI DSI to DP 

0x0F / 000 1111b 

D43 

Socket 

PCIe M.2 

(Device dependent) 

X48 

 

Содержание MBa8MPxL

Страница 1: ...MBa8MPxL User s Manual MBa8MPxL UM 0100 04 08 2022...

Страница 2: ...backup 10 3 1 5 Temperature sensor 10 3 1 6 Fan 10 3 1 7 Reset 11 3 2 Power supply 12 3 2 1 Protective circuitry 12 3 3 Communication interfaces 13 3 3 1 Ethernet 1000 Base T RGMII 13 3 3 2 SD card in...

Страница 3: ...rsonal security 33 7 CLIMATIC AND OPERATIONAL CONDITIONS 33 7 1 Protection against external effects 33 7 2 Reliability and service life 33 8 ENVIRONMENT PROTECTION 34 8 1 RoHS 34 8 2 WEEE 34 8 3 REACH...

Страница 4: ...12 Pinout DisplayPort X65 18 Table 13 Pinout MIPI CSI X57 19 Table 14 Pinout LVDS data X11 20 Table 15 Pinout LVDS control X7 20 Table 16 Pinout HDMI connector X44 21 Table 17 Pinout CAN FD connectors...

Страница 5: ...Block diagram SD card interface MBa8MPxL 14 Figure 11 Block diagram USB 3 0 Hub 15 Figure 12 Block diagram USB 3 0 OTG 15 Figure 13 Block diagram PCIe M 2 16 Figure 14 Block diagram UARTs 17 Figure 15...

Страница 6: ...z First edition 0002 16 03 2021 Petz All Figure 1 Table 2 Table 22 Table 23 Table 24 5 1 Figure 24 Non functional changes expressions phrases Updated 3 3 V for X555 removed Level and Dir for 1 8 V 3 3...

Страница 7: ...d and trademarks are rightly protected by a third party 1 3 Disclaimer TQ Systems GmbH does not guarantee that the information in this Preliminary User s Manual is up to date correct complete or of go...

Страница 8: ...sed This symbol represents important details or aspects for working with TQ products Command A font with fixed width is used to denote commands file names or menu items 1 7 Handling and ESD tips Gener...

Страница 9: ...omponents used for example CompactFlash cards are to be taken note of They contain if applicable additional information that must be taken note of for safe and reliable operation These documents are s...

Страница 10: ...are supported 1 i MX 8M Plus Dual Dual Cortex A53 2 i MX 8M Plus Quad 4 Lite Quad Cortex A53 3 i MX 8M Plus Quad 6 Video Quad Cortex A53 4 i MX 8M Plus Quad 8 ML AI Quad Cortex A53 2 1 MBa8MPxL block...

Страница 11: ...8 mm TE Connectivity CSI1 and CSI2 PCIe M 2 X48 M 2 PCIe USB 2 0 SIM card X46 SIM card holder SIM card slot SD card X42 USDHC2 Optional boot source and supply of module USB 3 0 X36 Stacked Type A USB...

Страница 12: ...User s Manual l MBa8MPxL UM 0100 l 2022 TQ Systems GmbH Page 6 2 3 MBa8MPxL interfaces location Figure 2 MBa8MPxL interfaces top...

Страница 13: ...User s Manual l MBa8MPxL UM 0100 l 2022 TQ Systems GmbH Page 7 2 3 MBa8MPxL interfaces continued Figure 3 MBa8MPxL interfaces bottom...

Страница 14: ...lution Further information can be found in the TQMa8MPxL User s Manual On the MBa8MPxL the standard interfaces like USB Ethernet etc provided by the TQMa8MPxL are routed to industry standard connector...

Страница 15: ...I2C4 Level shifter 3V3 3V3 HDMI signal conditioning chip 1V8 NP N P NP Figure 5 Block diagram I2 C bus The following table shows the addresses used on the TQMa8MPxL and the MBa8MPxL Table 4 I2 C devic...

Страница 16: ...tions are documented in the MBa8MPxL schematics The temperature sensor D1 is located on the top side of the MBa8MPxL see Figure 2 Table 5 Temperature sensor SE97BTP D1 Manufacturer Device Resolution A...

Страница 17: ...drain output low active Activates RESET of MBa8MPxL components Requires pull up on carrier board max 6 5 V RESET_3V3 O MBa8MPxL High Generated on MBa8MPxL from RESET_OUT IMX_ONOFF I MBa8MPxL High ON...

Страница 18: ...heoretically possible power consumption results from the standard compliant supply of the USB PCIe M 2 and LVDS interfaces as well as from the power available at the pin headers V_24V max 6 6 A V_5V_M...

Страница 19: ...event signals of ENET1 can be used via assembly option TQMa8MPxL RJ45 ENET_TSN RGMII0 ENET_QOS RGMII1 PHY 1 DP83867 PHY 2 DP83867 RJ45 EVENT1 EVENT2 SAI2 Pin header Figure 9 Block diagram Ethernet 10...

Страница 20: ...nd SD UHS 1 Speed Mode SDR104 with theoretically max 104 MB s are supported UHS 1 Speed Modes SDR12 SDR25 SDR50 and DDR50 are theoretically supported but not verified The TQMa8MPxL sets USDHC2 is to 1...

Страница 21: ...ending on the software and hardware used the effective read and write rates of the ports may vary TUSB8041 TQMa8MPxL LVDS CMD USB USB Host 4 PCIe M 2 Host 3 Host 1 Host 2 USB 3 0 USB Stacked Type A US...

Страница 22: ...e the PCIe interface of the TQMa8MPxL as well as a 3 3 V power supply Furthermore a USB host from the USB hub and an I2C interface are connected next to the PCIe lane When using the I2C functionality...

Страница 23: ...PER 0 PCIE_RXP 42 NC NC 39 GND GND 40 NC NC 37 PET 0 PCIE_TXN 38 NC NC 35 PET 0 PCIE_TXP 36 UART_RTS NC 33 GND GND 34 UART_CTS NC Mechanical Key E Key 32 UART_TXD NC Mechanical Key E Key 23 SDIO_RESE...

Страница 24: ...aximum of 500 mA This current must be subtracted from the current budget of the LM25119 The TC9595 s reference clock is generated by a 26 MHz oscillator which is connected to the REFCLK input TC9595XB...

Страница 25: ...is not assembled by default 5 V are provided at pins 56 58 and 60 This voltage may be loaded with a maximum of 300 mA TQMa8MPxL MIPI_CSI0 MIPI_CSI1 TQ Camera Adapter 5 V 300 mA 2x CSI_I2C ECSPI1 TRIGG...

Страница 26: ...port 4 of the USB 3 0 hub RESET BLT_EN PWR_EN CONTRAST PWM TQMa8MPxL LVDS0 CH0 CH1 LVDS Data USB LVDS Control 5 V 3 3 V GPIO3_IO14 GPIO3_IO 19 21 5 V 12 V USB 3 0 Hub Figure 17 Block diagram LVDS Tab...

Страница 27: ...pacitors between the module and the connector according to the EARC specification TQMa8MPxL HDMI HDMI socket HDMI signal conditioning Figure 18 Block diagram HDMI Table 16 Pinout HDMI connector X44 Pi...

Страница 28: ...CAN interfaces can each be terminated with a DIP switch Galv Isolation TQMa8MPxL CAN0 CAN1 3 pin shrouded header 3 pin shrouded header CAN Transceiver CAN Transceiver Figure 19 Block diagram CAN FD in...

Страница 29: ...output by replacement of resistors R77 78 to R79 80 TQMA8MPxL SAI3 I2C2 Audio Codec TLV320 3 5 mm Jack 3 5 mm Jack 3 5 mm Jack MIC Line Out Line In Figure 20 Block diagram audio interface Table 18 Pi...

Страница 30: ...gurable buttons see chapter 3 4 2 Alternatively both signals can be connected to a pin header All three signals use I2 C or UART pins of the i MX 8M Plus and have 3 3 V level 3 3 16 PWM The TQMa8MPxL...

Страница 31: ...I3 interface of the TQMa8MPxL RESET BLT_EN PWR_EN CONTRAST PWM TQMa8MPxL IO connector ECSPI3 High Side Switch V_24V_OUT GPIO1_IO 00 01 GPIO1_IO03 GPIO1_IO 06 07 GPIO1_IO09 GPIO1_IO 14 15 4x D_Out V_24...

Страница 32: ...in the following table All complete listing of all available signals can be found in Table 22 and Table 23 Table 21 Signals with IO functionality CPU pin name Signal Alternative Power group USDHC1_DA...

Страница 33: ...SS0 1 NAND 1 8 V O 29 30 GND Power Ground 31 32 ISO_7816_CLK TQMa8MPxL 3 3 V I Ground Power GND 33 34 ISO_7816_RST TQMa8MPxL 3 3 V I I O V_SAI2_SAI3 GPIO SPDIF_EXT_CLK1 35 36 ISO_7816_IO1 TQMa8MPxL 3...

Страница 34: ...from eMMC USDHC3 0 0 1 1 Boot from SD card USDHC2 0 1 0 x Boot from NAND not supported 0 1 1 0 Boot from QSPI 3 Byte Read 0 1 1 1 Boot from Hyperflash 3 3 V QSPI 1 0 0 0 Boot from eCSPI not supported...

Страница 35: ...L is active V5 Green Status 12 V MBa8MPxL lit when 12 V for MBa8MPxL is active V6 Green Status 5 V MBa8MPxL lit when 5 V for MBa8MPxL is active V7 Green Status 3 3 V MBa8MPxL lit when 3 3 V for MBa8MP...

Страница 36: ...TDO JTAG_TMS Figure 23 Block diagram JTAG The following table shows the JTAG connector pinout Table 26 Pinout JTAG pin header X22 Pin Signal Remark 1 Vref VCC 3 3 V optional 1 8 V 2 JTAG_TMS 10 k PU N...

Страница 37: ...t 5 3 Housing The form factor and the mounting holes of the MBa8MPxL are designed for installation in a standard EURO housing 5 4 Thermal management The combination of MBa8MPxL and TQMa8MPxL has a pow...

Страница 38: ...5 Assembly Figure 25 MBa8MPxL component placement top Figure 26 MBa8MPxL component placement bot The labels on the MBa8MPxL show the following information Table 27 Labels on MBa8MPxL Label Content AK...

Страница 39: ...nsing Attention TQMa8MPxL heat dissipation The i MX 8M Plus belongs to a performance category in which a cooling system is essential It is the user s sole responsibility to define a suitable heat sink...

Страница 40: ...is therefore no classification as dangerous goods Basic lithium content per cell not more than 1 grams except for lithium ion and lithium polymer cells for which a lithium content of not more than 1 5...

Страница 41: ...SPI enhanced Capability Serial Peripheral Interface eDP embedded DisplayPort EEPROM Electrically Erasable Programmable Read Only Memory EMC Electromagnetic Compatibility eMMC embedded Multimedia Card...

Страница 42: ...Pull Up PWM Pulse Width Modulation QSPI Quad Serial Peripheral Interface REACH Registration Evaluation Authorisation and restriction of Chemicals RGMII Reduced Gigabit Media Independent Interface RJ45...

Страница 43: ...documents No Name Rev Date Company 1 i MX 8M Plus Applications Processor Data Sheet Rev 1 08 2021 NXP 2 i MX 8M Plus Applications Processor Reference Manual Rev 1 03 2021 NXP 3 Mask Set Errata i MX 8M...

Страница 44: ...TQ Systems GmbH M hlstra e 2 l Gut Delling l 82229 Seefeld Info TQ Group TQ Group...

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