A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
2
1
3
4
5
6
7
8
2
1
3
4
5
6
7
8
NR2801
CRA108330JV
NR2802
CRA108330JV
NR2803
CRA108330JV
NR2815
CRA108330JV
NR2814
CRA108330JV
IC2801
R8J66955BG
SCALER IC
V2
P2
N4
T2
R4
P4
R2
R3
V1
R1
T4
W2
V4
W3
W1
U4
W7
W5
AB7
AA4
AA6
AB4
AA8
AA5
AB6
AB5
AA9
Y9
Y5
Y1
V3
T5
N1
N5
T1
V7
R5
AB8
AA7
AA1
Y2
P1
N2
U1
U2
N3
U3
AB3
Y4
W8
AA2
W9
Y6
AB2
AA3
W6
Y8
A2
IC2802
H5PS5162FFR-S5C
DDR2_SDRAM IC
R1
M9
J9
E1
A1
G9
G7
G3
E9
G1
C9
C7
C3
C1
A9
J1
J2
R8
R7
R3
E2
A3
E3
J3
N1
P9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
K2
K3
L2
L3
L1
L8
K9
L7
K7
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
K8
J8
A8
B7
E8
F7
B3
F3
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL.
WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST
NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED
C2829
0.1
10V
1005
B
C2821
0.1
10V
1005
B
C2823
0.1
10V
1005
B
C2825
0.1
10V
1005
B
C2826
0.1
10V
1005
B
C2828
0.1
10V
1005
B
C2815
0.1 B
C2813
0.1
10V
1005
B
C2816
0.1
10V
1005
B
C2818
0.1
10V
1005
B
C2820
0.1
10V
1005
B
C2822
0.1
10V
1005
B
C2811
10
10V
(2125)B
C2824
0.1
10V
1005
B
C2827
0.1
10V
1005
B
C2830
0.1
10V
1005
B
C2832
0.1
10V
1005
B
C2846
0.1
10V
1005
B
C2833
0.1
10V
1005
B
C2834
0.1
10V
1005
B
C2835
0.1
10V
1005
B
C2836
0.1
10V
1005
B
C2838
0.1
10V
1005
B
C2839
0.1
10V
1005
B
C2831
0.1
10V
1005
B
C2837
0.1
10V
1005
B
C2812
0.1
10V
1005
B
C2814
0.1
10V
1005
B
C2817
0.1
10V
1005
B
C2819
0.1
10V
1005
B
C2840
0.1
10V
1005
B
C2841
330
6.3V
V-S
R2842
4.7 1/16W
1005
R2831
120
1/16W
1005
R2843
4.7 1/16W
1005
R2830
1K
1/16W
+-1%
R2829
1K 1/16W
1005
+-1%
R2845
1K
1/16W
1005
+-1%
R2846
1K 1/16W
1005
+-1%
R2844
82 1/16W
+-1%
R2809
180 1/16W
1005
+-1%
R2841
33 1/16W
1005
R2832
33 1/16W
1005
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
NOTE:THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
SDDQ0
SDDQ1
SDDQ2
SDDQ3
SDDQ4
SDDQ5
SDDQ6
SDDQ7
SDDQ8
SDDQ9
SDDQ10
SDDQ11
SDDQ12
SDDQ13
SDDQ14
SDDQ15
DADQM0
DADQM1
DADQS0
DADQS0_N
DADQS1
DADQS1_N
DACLK
SDCLK
DACLK_N
SDCLK_N
SDBA2
SDBA1
SDBA0
SDODT
DRAM_A0
SDCKE
DRAM_A1
SDCS
DRAM_A2
DRAM_A3
SDRAS
DRAM_A4
SDCAS
DRAM_A5
SDWE
DRAM_A6
DRAM_BA1
SDBA1
DRAM_WE
SDWE
DRAM_A7
DRAM_A2
SDA2
DRAM_A8
DRAM_CS
SDCS
DRAM_A9
DRAM_A10
DRAM_A11
DRAM_BA0
SDBA0
DRAM_BA2
SDBA2
DRAM_A12
DRAM_CKE
SDCKE
SDA0
DRAM_A1
SDA1
SDA1
DRAM_RAS
SDA2
DRAM_CAS
SDA3
DRAM_ODT
DRAM_A9
SDA9
DRAM_CS
SDA4
DRAM_A3
SDA3
DRAM_A7
SDA7
DRAM_BA2
SDA5
DRAM_A12
SDA12
DRAM_BA1
SDA6
DRAM_BA0
SDA7
DRAM_A8
SDA8
DRAM_WE
DRAM_A11
SDA11
SDA8
DRAM_CKE DRAM_A5
SDA5
DRAM_A10
SDA10
SDA9
SDA10
SDA11
DRAM_CAS
SDCAS
SDA12
DRAM_A0
SDA0
DRAM_A4
SDA4
DRAM_A6
SDA6
DRAM_RAS
SDRAS
DRAM_ODT
SDODT
D1.8V
GND
H-34
H-33
22LV610U
FROM REGULATOR
PCBDH0
CEH432
DDR SCHEMATIC DIAGRAM
(DIGITAL PCB)
SDDQ1
SDDQ2
SDDQ3
SDDQ4
SDDQ5
SDDQ6
SDDQ7
SDDQ8
SDDQ9
SDDQ10
SDDQ11
SDDQ12
SDDQ13
SDDQ14
SDDQ15
SDDQ0
SDA1
SDA2
SDA3
SDA4
SDA5
SDA6
SDA7
SDA8
SDA10
SDA11
DDR DATA Interface
DDR Control
DDR Address
DQ0
DQ1
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
A0
A1
A2
A3
A4
A5
A6
A8
A9
A10
A11
A12
A7
RAS
CAS
ODT
CS
NC
BA0
BA1
WE
CKE
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSDL
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDL
VREF
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VCCQ18
VCCQ18
VCCQ18
VCCQ18
VCCQ18
VCCQ18
VCCQ18
VCCQ18
SDVREF1
SDVREF0
DD_CL
DDR POWER
SDA12
SDA9
LDM
UDM
LDQS
LDQS
UDQS
UDQS
CK
CK
SDDM0
SDDM1
SDDQS0
SDDQS0_N
SDDQS1
SDDQS1_N
SDDCLK
SDDCLK_N
SDA0
SDBA1
SDBA0
SDODT
SDCKE
SDCS
SDRAS
SDCAS
SDWE
SDBA2
NC5
NC4
NC3
NC2
NC1
NC
NC
NC
NC
NC
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.7
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
0.9
0.9
0.9
0.9
1.8
1.8