Introduction
www.ti.com
1
Introduction
The TI TSW14J50 evaluation module (EVM) is a low-cost pattern generator and data capture card used to
evaluate performances of the new TI JESD204B device family of high-speed analog-to-digital converters
(ADC) and digital-to-analog converters (DAC). For an ADC, by capturing the sampled data over a
JESD204B interface when using a high-quality, low-jitter clock, and a high-quality input frequency, the
TSW14J50 can be used to demonstrate datasheet performance specifications. Using Altera JESD204B IP
cores, the TSW14J50 can be dynamically configurable to support lane speeds from 600 Mbps to 6.5
Gbps, from 1 to 8 lanes, multiple converters, and multiple octets per frame with one firmware build.
Together with the accompanying
High-Speed Data Converter Pro Graphic User Interface
(GUI), it is a
complete system that captures and evaluates data samples from ADC EVMs and generates and sends
desired test patterns to DAC EVMs.
2
Functionality
The TSW14J50EVM has a single industry-standard FMC connector that interfaces directly with TI
JESD204B ADC and DAC EVMs. When used with an ADC EVM, high-speed serial data is captured, de-
serialized and formatted by an Altera Arria V GX FPGA. The data is then stored into an external DDR3
memory bank, enabling the TSW14J50 to store up to 256M 16-bit data samples. To acquire data on a
host PC, the FPGA reads the data from memory and transmits it on a serial peripheral interface (SPI). An
onboard high-speed USB-to-SPI converter bridges the FPGA SPI interface to the host PC and GUI.
In pattern generator mode, the TSW14J50 generates desired test patterns for DAC EVMs under test.
These patterns are sent from the host PC over the USB interface to the TSW14J50. The FPGA stores the
data received into the board DDR3 memory module. The data from memory is then read by the FPGA and
transmitted to a DAC EVM across the JESD204B interface connector. The board contains a 100-MHz
oscillator used to generate the DDR3 reference clock.
Figure 1
shows the TI TSW14J50EVM.
Figure 1. TSW14J50EVM
Microsoft, Windows are registered trademarks of Microsoft Corporation.
2
TSW14J50 JESD204B High-Speed Data Capture and Pattern Generator
SLAU576 – May 2014
Card User's Guide
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated