Texas Instruments TSW14J50 Скачать руководство пользователя страница 18 | Manualshive

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TSW14J50EVM

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Содержание TSW14J50

Страница 1: ...rs 7 4 Software Start Up 10 4 1 Installation Instructions 10 4 2 USB Interface and Drivers 10 4 3 Downloading Firmware 12 List of Figures 1 TSW14J50EVM 2 2 TSW14J50 EVM Block Diagram 4 3 GUI Installation 10 4 TSW14J50EVM Serial Number 11 5 High Speed Data Converter Pro GUI Top Level 11 6 Hardware Device Manager 12 7 Select ADC Firmware to be Loaded 12 8 Download Firmware Error Message 13 9 HSDC Pr...

Страница 2: ...s directly with TI JESD204B ADC and DAC EVMs When used with an ADC EVM high speed serial data is captured de serialized and formatted by an Altera Arria V GX FPGA The data is then stored into an external DDR3 memory bank enabling the TSW14J50 to store up to 256M 16 bit data samples To acquire data on a host PC the FPGA reads the data from memory and transmits it on a serial peripheral interface SP...

Страница 3: ... developed with Quartus II 13 0 and QSYS JESD RX IP core with support for SPI and JTAG reconfigurable JESD core parameters L M K F HD S and more ILA configuration data accessible through SPI and JTAG Lane alignment and character replacement enabled or disabled through SPI and JTAG JESD TX IP core with support for SPI and JTAG reconfigurable JESD core parameters L M K F HD S and more ILA data confi...

Страница 4: ...ons for 8 lanes of serial differential data two device clock pairs two SYSREF pairs two SYNC pairs four over range single ended indicators and 26 spare general purpose signals that can be used as CMOS I O pins or differential LVDS signals There are also two differential clock input pairs The data format for JESD204B ADCs and DACs is a serialized format where individual bits of the data are present...

Страница 5: ...ble In pattern generator mode the TSW14J50EVM generates desired test patterns for DAC EVMs under test These patterns are sent from the host PC over the USB interface to the TSW14J50 The FPGA stores the data received into the on board DDR3 memory The data from the memory is then read by the FPGA converted to JESD204B serial format then transmitted to a DAC EVM The TSW14J50 can generate patterns up ...

Страница 6: ...closed adds 1 6 V to 1 4 V IO voltage 3 2 2 Jumpers The TSW14J50 contains several jumpers JP and solder jumpers SJP that enable certain functions on the board The description of the jumpers is found in Table 2 Table 2 Jumper Description of the TSW14J50 Device Component Description Default JP4 JP5 JP6 and JP7 USB or JTAG control of FPGA programming Default is USB control 1 to 2 JP8 USB or internal ...

Страница 7: ... on a carrier card This specification is being used by FPGA vendors on their development platforms The FMC connector J4 provides the interface between the TSW14J50EVM and the ADC or DAC EVM under test This 400 pin Samtec high speed high density connector part number SEAF 40 05 0 S 10 2 A K is suitable for high speed differential pairs up to 21 Gbps In addition to the JESD204B standard signals 26 C...

Страница 8: ... G13 SYNC C M ADC Mezzanine bound SYNC signal for use in class 0 1 2 JESD204 systems TX_SYNC_P N F10 F11 DAC SYNC M C Carrier bound SYNC signal for use in class 0 1 2 JESD204 systems TX_ALT_SYNC_P N F19 F20 Alt DAC SYNC M C Alternate Carrier bound SYNC signal for use in class 0 1 2 JESD204B systems RX_CMOS_SYNC_P H31 Alt SYNC C M Alternate ADC Mezzanine bound SYNC signal For use when SYNC C M is n...

Страница 9: ...he SYNC outputs from a master TSW14J50 EVM to the EXT Trigger input SMA of a slave TSW14J50 EVM This function is currently not available 3 4 3 JTAG Connectors The TSW14J50EVM includes one industry standard JTAG connector that connects to the JTAG ports of the FPGA Jumpers on the TSW14J50EVM allow for the FPGA to be programmed from the JTAG connector or the USB interface JTAG connector J2 is used f...

Страница 10: ...ecutable and associated files reside in the following directory C Program Files x86 Texas Instruments High Speed Data Converter Pro 4 2 USB Interface and Drivers Connect a USB cable between J9 of the TSW14J50EVM and a host PC Connect the provided 5 VDC source to the EVM and 100 240 VAC 50 to 60 Hz source Click on the High Speed Data Converter Pro icon that was created on the desktop panel or go to...

Страница 11: ...heck the status of the host USB port When the software is installed and the USB cable is connected to the TSW14J50EVM and the PC the TSW14J50 USB serial converter should be located in the Hardware Device Manager under the universal serial bus controllers as shown in Figure 6 This is a quad device therefore an A B C and D USB serial converter are shown When the USB cable is removed these four are n...

Страница 12: ...S42JB69_LMF_421 as shown in Figure 7 The GUI prompts the user to update the firmware for the ADC Click Yes The GUI will display the message Downloading Firmware Please Wait The software now loads the firmware from the PC to the FPGA a process that takes about 30 seconds Once completed the GUI reports an Interface Type in the lower right corner and the FPGA_CONF_DONE LED D28 illuminates along with ...

Страница 13: ...vailable the message Loading Device GUI appears briefly After this occurs a new tab will show up at the top right of the HSDC Pro GUI main screen This new tab is seen in Figure 9 Clicking on the ADS42JBxx EVM GUI tab opens the ADS42JBxx EVM GUI inside of the HSDC Pro GUI The user can now configure the ADC EVM then return to HSDC Pro to do data captures Figure 9 HSDC Pro GUI with ADS42JBxx EVM GUI ...

Страница 14: ...ndling and use of EVMs and if applicable compliance in all respects with such laws and regulations 10 User has sole responsibility to ensure the safety of any activities to be conducted by it and its employees affiliates contractors or designees with respect to handling and using EVMs Further user is responsible to ensure that any interfaces electronic and or mechanical between EVMs and any human ...

Страница 15: ...This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at its own expense FCC Interference Statement ...

Страница 16: ...érieur au gain maximal indiqué sont strictement interdits pour l exploitation de l émetteur Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2014 Texas Instruments Incorporated spacer Important Notice for Users of EVMs Considered Radio Frequency Products in Japan EVMs entering Japan are NOT certified by TI as conforming to Technical Regulations of Radio Law of ...

Страница 17: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

Страница 18: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments TSW14J50EVM ...

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