Setup
5.1.5
S3: RESET Push-Button
Switch S3 is a push-button that will pull the HREST pin (D6) of the TPS65982 IC (U2) high when pressed.
Releasing the push-button will pull HRESET low again and the TPS65982 IC (U2) will go through a
hardware reset and reload firmware from the non-volatile memory of the Flash IC (U1).
5.1.6
J2 and J3: LaunchPad Receptacles
Receptacles J2 and J3 allow the TPS65982-EVM to interface with a standard TI LaunchPad. See the
TPS65982-EVM schematic in
and
to determine which signals from the LaunchPad are
connected to the TPS65982 IC (U2), or refer to
for a description of these connections.
5.1.7
TP5 and TP4 (GND): Ground (GND) Test Points
Test points TP4 and TP5, labeled GND, are connected to signal ground which is also connected to the
GND pins of the TPS65982 IC (U2). There are two test points on the board for easy attachment of
oscilloscope or multimeter ground connections. They are both connected directly to the signal ground
plane. Power, analog signals, and digital signals are all directly connected to GND.
5.1.8
TP3 (VBUS): VBUS Test Point
Test point TP3 provides a location to probe the voltage on VBUS, the input or output power rail connected
at the Type-C receptacle (J1).
5.1.9
TP2 (CC2): CC2 Test Point
Test point TP2 provides a location to probe the voltage on CC2, the secondary Cable Connection signal
connected at the Type-C receptacle (J1). When a Type-C cable is plugged in upside-down, the CC2 signal
is connected to the CC wire of the cable and the CC1 pin of the TPS65982 IC (U2). When a cable is
plugged in right-side up, the CC2 signal is connected to the VCONN wire of the cable and the CC2 pin of
the TPS65982 IC (U2).
5.1.10
TP1 (CC1): CC1 Test Point
Test point TP1 provides a location to probe the voltage on CC1, the primary Cable Connection signal
connected at the Type-C receptacle (J1). When a Type-C cable is plugged in right-side up, the CC1 signal
is connected to the CC wire of the cable and the CC1 pin of the TPS65982 IC (U2). When a cable is
plugged in upside-down, the CC1 signal is connected to the VCONN wire of the cable and the CC2 pin of
the TPS65982 IC (U2).
5.1.11
J6 (PP_EXT ENABLE): PP_EXT to External Power Jumper
Jumper J6 is a jumper which connects power from the External Power rail provided at J4 to the PP_EXT
external NexFETS (Q1 and Q2) rated for 20 V and 5 A of current. Pin 1 of this jumper is connected to J4
and pin 2 is connected to the External Power rail of the system; therefore, if this jumper is shunted and a
20-V DC power supply is connected, the external DC power supply will provide the External Power rail to
the system and to the PP_EXT external FET path.
5.1.12
J5 (Not Populated): Header for System_3V3, System_5V, and HV_Source
Header J5 is not populated, but provides test points for probing the voltage on the HV_Source rail at pin 1
(marked by rectangular pad), the voltage on the System_5V rail at pin 2, and the voltage on the
System_3V3 rail at pin 3. If J5 is installed, a DC power supply may also be used to apply 12 V to the
HV_Source rail, 5 V to the System_5V rail, and/or 3.3 V to the System_3V3 rail when J4 is not used, J6 is
not used, and/or J7 is not used to provide power to these rails of the system.
5.1.13
J1: USB Type-C Receptacle
Receptacle J1 is the USB Type-C port where a USB Type-C cable can be plugged into the TPS65982-
EVM.
9
SLVUAF8C – June 2015 – Revised November 2015
TPS65982 Evaluation Module
Copyright © 2015, Texas Instruments Incorporated
