DDR_D0
DDR_D7
DDR_DQM0
DDR_DQS0
DDR_DQSn0
DDR_D8
DDR_D15
DDR_DQM1
DDR_DQS1
DDR_DQSn1
DQ0
DQ7
LDM
LDQS
DQ8
DQ15
UDM
UDQS
BA0
A0
A15
CS
CAS
RAS
WE
CKE
CK
CK
DDR_BA0
DDR_A0
DDR_A15
DDR_CSn0
DDR_CASn
DDR_RASn
DDR_WEn
DDR_CKE
DDR_CK
DDR_CKn
DDR_VREF
16-Bit LPDDR
Device
DDR_VTP
49.9
( 1%, 20 mW)
Ω
±
DDR_ODT
DDR_RESETn
NC
AM335x
T
T
T
T
T
T
T
T
T
T
BA1
DDR_BA1
DDR_BA2
NC
NC
T
NC
(A)
NC
(A)
NC
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
SPRS717H – OCTOBER 2011 – REVISED MAY 2015
A.
Enable internal weak pulldown on these pins. For details, see the EMIF section of the
AM335x Sitara Processors
Technical Reference Manual
(
B.
For all the termination requirements, see
.
Figure 7-33. 16-Bit LPDDR Interface Using One 16-Bit LPDDR Device
150
Peripheral Information and Timings
Copyright © 2011–2015, Texas Instruments Incorporated
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