Individual Instruction Descriptions
4-75
Assembly Language Instructions
4.14.1 ADD
Add word
Syntax
[label]
name
dest, src [, src1] [,mod]
Clock, clk
Words, w
With RPT, clk
Class
ADD
An[~], An, {adrs} [, next A]
Table 4–46
Table 4–46
Table 4–46
1a
ADD
An[~], An[~], imm16 [, next A]
2
2
N/R
2b
ADD
An[~], An[~], PH [, next A]
1
1
n
R
+3
3
ADD
An[~], An~, An [, next A]
1
1
n
R
+3
3
ADD
Rx, imm16
2
2
N/R
4c
ADD
Rx, R5
1
1
n
R
+3
4d
ADD
†
APn, imm5
1
1
N/R
9c
† Does not affect the status flags.
Execution
[premodify AP if mod specified]
dest
⇐
dest + src
(for two operands)
dest
⇐
src + src1
(for three operands)
PC
⇐
PC + w
Flags Affected
dest is An:
OF, SF, ZF, CF are set accordingly
dest is Rx:
RCF, RZF are set accordingly
src1 is {adrs}:
TAG is set accordingly
Opcode
Instructions
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADD An[~], An, {adrs} [, next A]
0
0
0
0
~A
next A
An
adrs
x
dma16 (for direct) or offset16 (long relative) [see section 4.13]
ADD An[~], An[~], imm16 [, next A]
1
1
1
0
0
next A
An
0
0
0
0
0
1
A~
~A
x
imm16
ADD An[~], An[~], PH [, next A]
1
1
1
0
0
next A
An
0
1
1
0
1
0
A~
~A
ADD An[~], An~, An [, next A]
1
1
1
0
0
next A
An
0
0
1
0
1
0
A~
~A
ADD Rx, imm16
1
1
1
1
1
1
1
0
0
0
0
0
Rx
0
0
x
imm16
ADD Rx, R5
1
1
1
1
1
1
1
0
0
1
0
0
Rx
0
0
ADD APn, imm5
1
1
1
1
1
0
1
APn
0
1
0
imm5
Содержание MSP50C6xx
Страница 1: ...MSP50C6xx Mixed Signal Processor User s Guide Mixed Signal Products SPSU014A Printed on Recycled Paper...
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Страница 296: ...Instruction Set Summay 4 210 Assembly Language Instructions...
Страница 332: ...Implementation Details 5 36 R7 Return Addr Return Addr Param 2 Param 2 Param 1 Param 1 R5 Stack data Function call...
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