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2.5.2 CAN-FD Connectors
The EVM supports up to Six [6] CAN Bus interfaces.
Table 2-13. CAN-FD Interface Assignment
Connector
Process Resource
J30_CP
MCU MCAN0
J31_CP
MCU MCAN1
J27_CP
MAIN_MCAN3
J28_CP
MAIN_MCAN5
J10_SOM
MAIN_MCAN16
Each Controller Area Network (CAN) Bus interface is supported on a 3-pin, 2.54-mm pitch header. The
interface meets ISO 11898-2 and ISO 11898-5 physical standards and supports CAN and optimized CAN-FD
performance up to 8 Mbps. Each includes CAN Bus end-point termination. If the EVM is included in a network
with more than two nodes, the termination my need to be adjusted.
Table 2-14. CAN-FD Header Pin Definition
Pin #
Pin Name
Description
Direction
1
CAN-H
High-Level CAN Bus Line
Bi-Dir
2
GND
Ground
3
CAN-L
Low-Level CAN Bus Line
Bi-Dir
4
WAKE (J30, J27 only)
Assert PHY Wake Function
Input
2.5.3 Camera Interfaces [J52_CP]
The EVM includes 40-pin (2x20, 0.5-mm pitch) high speed connectors [J52] for connecting with cameras and
other image capture devices. This expansion connector can support up to two CSI2 interfaces. The bandwidth of
each CSI2 interface is 10Gbps (4 data lanes each up to 2.5Gbps). The expansion connector also includes power
and other IO for communicating with the capture devices. All control signals are configurable for 3.3-V or 1.8-V
IO voltage levels. See
Table 2-15. High Speed Camera Expansion Pin Definition [J52]
Pin #
Pin Name
Description Processor
Resource for [J52]
Dir
1
Power
Power, 12 V
Output
2
I2C_SCL
I2C Bus Clock (I2C5)
Bi-Dir
3
Power
Power, 12 V
Output
4
I2C_SDA
I2C Bus Data (I2C5)
Bi-Dir
5
CSIa_CLK_P
CSI Port 0 / Port 2
Input
6
GPIO0/PWMA
IO Expander 0x20 bit P1 / Open
Output
7
CSIa_CLK_N
CSI Port 0 / Port 2
Input
8
GPIO1/PWMV
IO Expander 0x20 bit P2 / bit P4
Bi-Dir
9
CSIa_D0_P
CSI Port 0 / Port 2
Input
10
REFCLK
25MHz Reference Clock
Output
11
CSIa_D0_N
CSI Port 0 / Port 2
Input
12
GND
Ground
13
CSIa_D1_P
CSI Port 0 / Port 2
Input
14
RESETz
GPIO, IO Expander 0x20 bit P0
Output
15
CSIa_D1_N
CSI Port 0 / Port 2
Input
16
GND
Ground
17
CSIa_D2_P
CSI Port 0 / Port 2
Input
User Interfaces
SPRUJ69 – DECEMBER 2022
Jacinto7 TDA4VE-Q1/TDA4VL-Q1/TDA4AL-Q1 Evaluation Module (EVM)
15
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