V104
Appendix C: UART SCC2691
C-1
Appendix C:
UART SCC2691
1. Pin Description
D0-D7
Data bus, active high, bi-directional, and having 3-State
/CEN
Chip enable, active-low input
/WRN
Write strobe, active-low input
/RDN
Read strobe, active-low input
A0-A2
Address input, active-high address input to select the UART registers
RESET
Reset, active-high input
INTRN
Interrupt request, active-low output
X1/CLK
Crystal 1, crystal or external clock input
X2
Crystal 2, the other side of crystal
RxD
Receive serial data input
TxD
Transmit serial data output
MPO
Multi-purpose output
MPI
Multi-purpose input
Vcc
Power supply, +5 V input
GND
Ground
2. Register Addressing
A2
A1
A0
READ (RDN=0)
WRITE (WRN=0)
0
0
0
MR1,MR2
MR1, MR2
0
0
1
SR
CSR
0
1
0
BRG Test
CR
0
1
1
RHR
THR
1
0
0
1x/16x Test
ACR
1
0
1
ISR
IMR
1
1
0
CTU
CTUR
1
1
1
CTL
CTLR
Note:
ACR = Auxiliary control register
BRG = Baud rate generator
CR = Command register
CSR = Clock select register
CTL = Counter/timer lower
CTLR = Counter/timer lower register
CTU = Counter/timer upper
CTUR = Counter/timer upper register
MR = Mode register
SR = Status register
RHR = Rx holding register
THR = Tx holding register
3. Register Bit Formats
MR1 (Mode Register 1):
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RxRTS
0 = no
1 = yes
RxINT
0=RxRDY
1=FFULL
Error
0 = char
1 = block
___Parity Mode___
00 = with parity
01 = Force parity
10 = No parity
11 = Special mode
Parity Type
0 = Even
1 = Odd
In Special
mode:
0 = Data
1 = Addr
Bits per Character
00 = 5
01 = 6
10 = 7
11 = 8