Terasic CY8CKIT-035, Руководство пользователя, Страница: 30 / 50

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When the trimming menu is displayed, pressing and holding SW1 on the CY8CKIT-001 PSoC
DVK (SW2 on the CY8CKIT-030 PSoC 3 DVK) for a longer period will enable manual trimming
control for the next secondary regulator. To get back to the main voltage display menu, cycle
through all 4 manual trim menus by pressing and holding SW1 on the CY8CKIT-001 PSoC DVK
(SW2 on the CY8CKIT-030 PSoC 3 DVK) for a longer period.
Technical Details – Voltage Sequencer and Under/Over-Voltage Fault Detection
The voltage sequencer and under/over-voltage window comparator circuits are fundamentally the
same in this example as they were for Example1, so they will not be discussed again here.
One thing to note is that when running the example project on the CY8CKIT-030 PSoC 3 DVK,
only 2 of the voltage rails (V1=5V and V3=2.5V) can be routed to the window comparator circuit
due to the PSoC port pins available on Port E of the DVK. The other voltage rails (V2=3.3V and
V4=1.8V) are monitored using the ADC and compared against the under/over voltage thresholds
using a +/-10% window. When running this example project on the CY8CKIT-030 PSoC 3 DVK, it
may not be possible to generate faults on those rails using the switches in the trimming menus.
Technical Details – Voltage and Current Measurements
In Example2, voltage rail voltage and current measurements use the differential 12-bit Delta-Sigma
ADC with 0.1% internal accurate voltage reference. The PSoC Creator circuit is shown below:
(
Figure 4-23
)